United States Patent
US Patent 7015120: Method of fabricating semiconductor devices…
US 7015120 · granted 2006-03-21
| Patent Number | 7015120 |
|---|---|
| Title | Method of fabricating semiconductor devices employing at least one modulation doped quantum well structure and one or more etch stop layers for accurate contact formation |
| Filed | 2003-01-13 |
| Granted | 2006-03-21 |
| Inventor(s) | Geoff W. Taylor, Scott W. Duncan |
| Assignee | University of Connecticut |
| CPC Classification | H10D62/8161, H10D62/815, H10D62/80 |
| Number of Claims | 2 |
Claims Summary
1. A method of fabricating a semiconductor device comprising the steps of:
providing a series of layers formed on a substrate, said layers including a first plurality of layers comprising n-type dopant material, a second plurality of layers that form a p-type modulation doped quantum well structure, and a third plurality of layers including an n-type modulation doped quantum well structure, wherein said first plurality of layers includes an n-type ohmic contact layer and a first etch stop layer for contacting said n-type ohmic contact layer;