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Steven S. Greenberg Patents
Inventor:
Greenberg; Steven S.
Address:
Beaverton, OR
No. of patents:
4
Patents:












Patent Number Title Of Patent Date Issued
7555417 Selectively reducing the number of cell evaluations in a hardware simulation June 30, 2009
An electrical circuit comprising a plurality of cells can be simulated to produce simulation results by sorting cells between active status cells and inactive status cells and reducing the processing of simulation results from inactive cells to thereby save simulation time.
7181706 Selectively reducing the number of cell evaluations in a hardware simulation February 20, 2007
An electrical circuit comprising a plurality of cells can be simulated to produce simulation results by sorting cells between active status cells and inactive status cells and reducing the processing of simulation results from inactive cells to thereby save simulation time.
6961689 Scheduling non-integral simulation time for mixed-signal simulation November 1, 2005
In the simulation of an analog and mixed-signal analog-digital physical circuit, events are assigned scheduled times. The events are stored in buckets in a hash table, with the scheduled times of the events in each bucket associated with the bucket. The scheduled times are organized into
5157778 Method and apparatus for circuit simulation using parallel processors including memory arrangeme October 20, 1992
A digital data processing system including a plurality of processors processes a program in parallel to load process data into a two-dimensional matrix having a plurality of matrix entries. So that the processors will not have to synchronize loading of process data into particular lo










 
 
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