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Bowling scorer utilizing semiconductor elements |
| RE30467 |
Bowling scorer utilizing semiconductor elements
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| Patent Drawings: | |
| Inventor: |
House, et al. |
| Date Issued: |
December 30, 1980 |
| Application: |
05/974,624 |
| Filed: |
December 29, 1978 |
| Inventors: |
House; Robert W. (Columbus, OH)
King; Rolland D. (Columbus, OH)
Roller; Robert F. (Columbus, OH)
Williams; David A. (Largo, FL)
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| Assignee: |
Brunswick Corporation (Muskegon, MI) |
| Primary Examiner: |
Krass; Errol A. |
| Assistant Examiner: |
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| Attorney Or Agent: |
Wegner, Stellman, McCord, Wiles & Wood |
| U.S. Class: |
377/5; 473/54; 473/70; 700/92 |
| Field Of Search: |
364/411; 235/92GA; 235/92R; 273/37; 273/54C; 340/323B |
| International Class: |
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| U.S Patent Documents: |
2590444; 2652252; 3043593; 3093374; 3124355; 3184583; 3202803; 3250534; 3310659; 3331604; 3488055; 3738652 |
| Foreign Patent Documents: |
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| Other References: |
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| Abstract: |
.Iadd.An electronic scorer for scoring bowling games played by a multiplicity of players including a device for receiving pinfall information relevant to the balls rolled by a multiplicity of players during a bowling game, a single computation device for computing the bowling scores for all of the multiplicity of players, a multiple player storage for storing scores held by the multiplicity of players and other information relevant to their games and a single control system connected to the pinfall receiving device, the computer and the multiple player storage for directing the computation of the bowling scores of each of the multiplicity of players. .Iaddend. |
| Claim: |
What is claimed is:
1. An apparatus for scoring a bowling game for a multiplicity of players comprising: means for receiving pinfall information for a multiplicity of players, a singlecomputation means for computing bowling scores for said multiplicity of players connectable to said receiving means a multi-player storage means for storing scores earned by said multiplicity of players connectable to said single computation means, meansfor providing said single computation means with any one of the stored scores in said multi-player storage means, and a single control means connected to said single computation means for directing the computation of bowling scores for each of saidmultiplicity of players.
2. An apparatus for scoring a bowling game as specified in claim 1, wherein said multi-player storage means is connectable to said single computation means through a single register in which the computation means accomplishes all scoretotalizing.
3. An apparatus for scoring a bowling game as specified in claim 2, wherein said pinfall receiving means includes a storage means for receiving a first ball pinfall and a register for receiving a second ball pinfall.
4. A bowling scorer as specified in claim 2, wherein said register consists of a series of bi-stable electronic circuits.
5. A bowling scoring device for scoring a multiplicity of bowling games simultaneously played on a multiplicity of bowling lanes by a multiplicity of players where each game consists of a number of scoring frames, each including pinfall relatedto the rolling of at least one ball by a player, comprising: means for receiving pinfall information indicative of the rolling of a first ball and of the rolling of a second ball of each scoring frame for a multiplicity of players bowling on amultiplicity of bowling lanes, a single computation means for computing bowling scores attributable to each pinfall total for said multiplicity of players connectable to said receiving means for sequentially accepting and processing said first and secondball pinfall information, a multi-player storage means for storing scores earned by said multiplicity of players connectable to said computation means and control means connected to said computation means for directing said computation means to acceptpinfall information for a given player bowling on one of said multiplicity of lanes from said receiving means without waiting for a second ball pinfall information for another player bowling on another of said multiplicity of lanes to be available in thereceiving means after said other player's first ball information has been accepted and processed by the computation means.
6. The invention of claim 5 wherein said control means comprises means operative after both first and second ball pinfalls to cause said single computation means to perform the scoring computation required, and means operative after thecomputation performed after both first and second ball pinfalls for writing the results of such computation into said memory for subsequent use in succeeding computations for the associated player whereby said single computation means is cleared aftereach pinfall in readiness to accept scores and pinfall information for any one of said multiplicity of players bowling on any one of said multiplicity of lanes.
7. A bowling scoring device for scoring a team bowling game, wherein a bowling team alternates its bowling on two lanes and wherein two players of the team may simultaneously bowl on two lanes, comprising: means for receiving pinfall informationfor players of a team simultaneously bowling on two lanes, a single computation means for computing bowling scores for the players connectable to said receiving means, a multi-player storage means for storing scores earned by said team playersconnectable to said computation means, and a single control means connected to said computation means for control thereof for directing the computation of player scores of a team simultaneously bowling on two lanes.
8. An apparatus for scoring a bowling game, wherein a multiplicity of players bowl and the past history of each player's frame-by-frame and ball-by-ball scoring is indicative of the state of the player's game when subsequent pinfall is suppliedwhich is indicative of the player's subsequent rolling of a bowling ball, comprising: means for supplying pinfall information for a multiplicity of players indiative of each player's pinfall resulting from either a first ball or a second ball in a frame,means for receiving each player's pinfall information connectable to said pinfall supplying means, a single computation means for computing bowling scores for said multiplicity of players connectable to said receiving means, a multi-player storage meansfor storing scores earned by said multiplicity of players connectable to said single computation means, and a single control means connected to said single computation means and connectable to said storage means for directing the computation of eachscore based on the respective player's state, said control means including means for computing the state of a player's game subsequent to each pinfall.
9. An apparatus for scoring a bowling game as specified in claim 8, wherein said control means provides a formula for dictating the computation of each score based on the respective player's state and said single computation means computes eachscore in accordance with the formula provided by said control means.
10. A bowling scoring device for scoring a multiplicity of bowling games simultaneously played on a multiplicity of bowling lanes by a multiplicity of players wherein each game consists of a number of scoring frames, each including pinfallrelated to the rolling of at least one ball by a player and wherein the past history of each player's frame-by-frame and ball-by-ball scoring is indicative of the state of the player's game when subsequent pinfall is supplied which is indicative of theplayer's subsequent rolling of a bowling ball, comprising: means for supplying pinfall information for a multiplicity of players bowling on a multiplicity of lanes which is indicative of each player's pinfall resulting from either a first ball or asecond ball in a frame, means for receiving pinfall information indicative of the rolling of a first ball and of the rolling of a second ball of each scoring frame for the multiplicity of players connectable to said pinfall supplying means, a computationmeans for computing bowling scores attributable to pinfall information for each of said multiplicity of players connectable to said receiving means for sequentially accepting and processing said first and second ball pinfall information, a multi-playerstorage means for storing a score and the stae of each player's game for said multiplicity of players connectable to said computation means, and a control means connected to said computation means and connectable to said storage means for directing saidcomputation means to accept pinfall information for a given player from said receiving means without waiting for second ball pinfall information for another player to be available in the receiving means after said other player's first ball pinfallinformation has been accepted and processed by the computation means and to compute a score for each player based on the player's state, said control means including means for computing the state of a player's game subsequent to each pinfall.
11. A bowling scoring device for scoring a bowling game, wherein a multiplicity of players bowl in accordance with a predetermined set of rules which prescribes scoring resulting from each pinfall indicative of each rolling of a bowling ball byeach player, comprising: means for receiving pinfall information indicative of every roll of a ball by each of a multiplicity of players, a control means for providing a formula for dictating the computation of scores resulting from each pinfall, asingle computation means connectable to said control means and to said receiving means for computing bowling scores for said multiplicity of players resulting from each pinfall in accordance with the formula provided by said control means, and amulti-player storage means connectable to said computation means and said control means for storing prior scoring data of said multiplicity of players.
12. A bowling scoring device for scoring a multiplicity of bowling games simultaneously played on a multiplicity of bowling lanes by a multiplicity of players in accordance with a predetermined set of rules, which prescribes a number of scoringframes, each including pinfall related to the rolling of at least one ball by a player, and which prescribes scoring resulting from each pinfall, comprising: means for receiving pinfall information indicative of the rolling of every first ball and of therolling of every second ball of each scoring frame for a multiplicity of players bowling on a multiplicity of bowling lanes, a computation means for computing bowling scores attributable to each pinfall total for said pinfall of players connectable tosaid receiving means for sequentially accepting and processing said first and second ball pinfall information, a storage means for storing prior scoring data for said multiplicity of players connectable to said computation means, and control meansconnected to said computation means and connectable to said storage means for directing said computation means to accept pinfall information for a given player from said receiving means without waiting for second ball pinfall information for anotherplayer to be available in the receiving means after said other player's first ball pinfall information has been accepted and processed by the computation means and for providing a formula for dictating the computation of scores resulting from eachpinfall by said computation means.
13. An apparatus for scoring a set of league bowling games wherein a pair of bowling teams alternate their bowling on a pair of lanes, wherein each team starts bowling each game of the set on the opposite lane from the lane on which it startedbowling the previous game, comprising: means for supplying pinfall information for players of two teams bowling a set of league bowling games, means for receiving pinfall information connected to said supplying means, means for effecting bowling scoringfor said players of said teams connectable to said receiving means, and automatic means for determining a lane upon which a team is bowling at any time during the playing of a set of league bowling games, connectable to said receivng means for receivingan indication that a pinfall relating to one of said lanes has been received by the receiving means and connectable to said means for effecting scoring to indicate the player whose pinfall has been received by the receiving means, said determining meansincluding means for automatically indicating that a team has changed lanes between the end of one game of a set and the subsequent game of the set.
14. An apparatus for scoring a bowling game wherein a multiplicity of players bowl, comprising: means for receiving pinfall information for a multiplicity of players, computation means for computing bowling scores for said multiplicity ofplayers connectable to said receiving means, multi-player storage means for storing scores earned by said multiplicity of players connectable to said single computation means, control means connected to said computation means for control thereof, a powersupply connected to said receiving, computation and storage means to supply power thereto and adapted to normally receive electrical power from an external source, an emergency source of electrical power connected to supply electrical power to saidreceiving computation and storage means when said external electrical power source fails, means for detecting a failure of said external electrical power source connected to said external source, means for disconnecting said emergency source from saidreceiving, computation and storage means, and means for determining the completion of a computation and the storing of a resulting score in said receiving, computation and storage means connected to said disconnecting means to actuate it upon thecompletion of the computation and the storing of the resulting score.
15. A bowling scoring device for scoring bowling games, wherein a multiplicity of players bowl and wherein the past history of a player's frame-by-frame and ball-by-ball scoring is indicative of the state of a player's game, comprising: meansfor receiving pinfall information for a multiplicity of players, a computation means for computing bowling scores for each of said multiplicity of players connectable to said receiving means, a control means connectable to said computation means fordirecting the computation of bowling scores for each of said multiplicity of players, and a multi-player storage means having a code word for each player containing player information and connectable to said computation means and said control means forutilization of the player information in the computing of bowling scores.
16. A bowling scorer as specified in claim 15, wherein said player code word contains a player's identification, and said device further includes means for selecting a player code word from said storage means by said player's identification.
17. A bowling scorer as specified in claim 15, wherein said computation means includes a register for receiving a player's score and each player code word contains a player's score.
18. A bowling scorer as specified is claim 15, wherein said control means includes a register for receiving the state of a player's game and each player code word contains the state of a player's game.
19. A bowling scorer as specified in claim 15, wherein said device further includes a register for receiving a player's frame and each player code word contains frame information.
20. A bowling scorer as specified in claim 15, wherein said multiplayer memory is electronic and includes a plurality of bits for team code words, each contaning a team'mark total score.
21. A bowling score as specified in claim 15 wherein said computation means includes a first register for receiving a player's score; said control means includes a second register for receiving the state of a player's game; said device furtherincluding a third register for receiving a player's frame; and each said player code word contains the player's score, the state of the player's game and the player's frame.
22. In an apparatus for scoring a team bowling game wherein the scores of a plurality of players bowling as a team are added to form a team total, the combination of: an operating register, means connected to the operating register fortransferring player and team code words containing player and team scores into and out of said operating register, a second register connected to said operating register to receive a player's coded score when the player's coded word is positioned in saidoperating register and to add a player's score contained in the second register to the score in a team coded word when the team word has been transferred into the operating register.
23. The invention of claim 22 further including means for receiving pinfall information relative to said plurality of players bowling as a team, memory means for storing said player scores during the progress of a bowling game, and computationmeans including said operating register for utilizing pinfall information obtained from said receiving means for computing said player scores.
24. The invention of claim 22 wherein said operating register comprises a binary up counter formed of a plurality of bi-stable electronic elements and said second register comprises a binary down counter comprised of a plurality of bi-stableelectronic elements; and control means for said second register comprising means operative at a predetermined point in a bowling bame for loading a player score contained in aid operating register into said second register, electronic clock means forsimultaneously causing said second register to count downwardly and said operating register to count upwardly, means operative subsequent to said loading means for effectively enabling said clock means, and means operative when said second register hasbeen counted down to zero for effectively disabling said clock means. .[.25. A device for scoring a bowling game wherein a multiplicity of team players bowl and wherein an individual player handicap is to be entered into at least one player's score,comprising: means for receiving pinfall information for a multiplicity of players, a computation means for computing bowling scores for said multiplicity of players connectable to said receiving means, multiplayer storage means for storing scores earnedby said multiplicity of players connectable to said computation means, a first selecting means for indicating a player whose score is to have an individual handicap value added thereto connectable to said storage means to cause the storage means to makethe indicated player's score available to said computation means for adding the handicap value, a second selecting means for indicating the handicap value to be added to the indicated player's score connectable to said computation to cause saidcomputation means to add
said handicap value to the player's score..]. 26. An apparatus for scoring a team bowling game, comprising: means for receiving pinfall information for a multiplicity of players bowling on a team, a single computation means for computingbowling scores for said multiplicity of players connectable to said receiving means, a multi-player storage means for storing scores earned by said multiplicity of players and a team subtotal score connectable to said computation means, an indicatingmeans connected to said storage means for providing team subtotal score information, and a control means connected to said computation means, connectable to said storage means and connectable to said score indicating means for directing the computationof individual player total scores and the computation of a team subtotal score after each individual player total score is computed and for directing said indicating means to indicate each said team
subtotal score after it is computed. 27. An apparatus for scoring a bowling game wherein a multiplicity of players bowl each bowling frame in a predetermined sequence and it becomes necessary to pass by a player who is not prepared to bowl inproper sequence, comprising: means for receiving pinfall information for a multiplicity of players, a computation means for computing bowling scores connectable to said receiving means for sequentially receiving pinfall for said players, a binaryelectronic counter for indicating an identification number for a player in a predetermined sequence of players whose pinfall will next be received by said computation means, a multi-player storage means for storing scores earned by said multiplicity ofplayers connectable to said computation means and to said binary electronic counter for providing the stored score of each player to said computation means when said counter indicates the identification number of the player, an automatic switching meansconnected to said binary electronic counter and to said computation means to cause the counter to count upward one player identification number whenever the computation means completes computing bowling scores resulting from a player's pinfall it hasreceived from said receiving means, a manually operated switching means connected to said binary electronic counter to cause the counter to count upward one player identification number whenever said switching means is manually actuated.
8. An apparatus for scoring a bowling game wherein a multiplicity of players bowl each bowling frame in a predetermined sequence and it becomes necessary to allow an out-of-turn player to bowl between two players who are bowling in thepredetermined sequence: means for receiving pinfall information for a multiplicity of players, a computation means for computing bowling scores, connectable to said receiving means for sequentially receiving pinfall for said players, a binary electroniccounter for indicating a binary identification number for a player in a predetermined sequence of players whose pinfall will next be received by said computation means, a manually operated selecting means for indicating a binary identification number foran out-of-turn player who is bowling between two players who are bowling in the predetermined sequence, a multiplayer storage means for storing scores earned by said multiplicity of players normally connected to said computation means and to said binaryelectronic counter for providing the stored score of each player to said computation means when said counter indicates the identification of the player, and a manually operated switching means for connecting said storage means to said manually operatedidentification number selecting means and disconnecting the storage means from said binary electronic counter to provide the stored score of the out-of-turn player indicated by the selecting means. .[.29. An apparatus for scoring team bowling gameswherein a multiplicity of team players bowl and wherein a team handicap is to be entered into a team total score, comprising: means for receiving pinfall information for a multiplicity of players, a computation means for computing bowling scores for saidmultiplicity of players connectable to said receiving means, a multi-player storage means having a code word for each player which contains the player's score and a code word for the team total score connectable to the computation means through anelectronic binary register in which the computation means accomplishes score totalizing, a first manually operated selecting means for indicating a code word for a team whose score is to have a handicap value added thereto connectable to said storagemeans to have the storage means place the code word for the indicated team in the register, a second manually operated selecting means for indicating the handicap value to be added to the team's score connectable to said computation means to cause saidcomputation means to add said handicap value to the score contained in the
code word in the register..]. 30. An apparatus for scoring team bowling games wherein a multiplicity of team players bowl and wherein an absent player's score is to be entered into a team total score, comprising: means for receiving pinfallinformation for a multiplicity of players, a computation means for computing bowling scores for said multiplicity of players connectable to said receiving means, a multiplayer storage means having a code word for each player which contains the player'sscore and a code word for the team total score connectable to the computation means through an electronic binary register in which the computation means accomplishes score totalizing, a first manually operated selecting means for indicating a code wordfor an absent player whose score is to be added into the team total score connectable to said storage means to have the storage means place the code word for the indicated absent player in the register, a second manually operated selecting means forindicating the absent player's score to be added to the team total score connectable to said computation means to cause said computation means to place the absent
player's score in the code word in the register. 31. An apparatus for scoring a team bowling game wherein teams of different numbers may be scored, comprising: means for receiving pinfall information for a multiplicity of players, acomputation means for computing bowling scores connectable to said receiving means for sequentially receiving pinfall for said players, a binary electronic counter for indicating a binary identification number for a player in a predetermined sequence ofplayers whose pinfall will next be received by said computation means connected to said computation means to receive a signal indicative of a completed computation resulting from a pinfall, a manually operated team size selection switching means formanually indicating the number of players bowling on a team, an electronic multiple gate circuit connected to said electronic counter and to said switching means for issuing a signal to said counter to cause said counter to indicate a first player onanother team when the counter receives a signal from the computation means, and a multi-player storage means for storing scores earned by said multiplicity of players normally connected to said computation means and to said binary electronic counter forproviding the stored score of each player to said computation means when said counter indicates the identification of the
player. 32. An apparatus for scoring a bowling game wherein a multiplicity of players bowl on a lane, comprising: means for receiving pinfall information for a multiplicity of players, a computation means for computing bowling scoresconnectable to said receiving means for sequentially receiving pinfall for said players, a binary electronic counter for indicating a binary identification number for a player in a predetermined sequence of players whose pinfall will next be received bysaid computation means connected to said computation means to receive a signal indicative of a completed computation resulting from a pinfall, a manually operated selection switching means for manually indicating the number of players bowling on a lane,an electronic multiple gate circuit connected to said electronic counter and to said switching means for issuing a signal to said counter to cause said counter to indicate a first player in said sequence when the counter receives a signal from thecomputation means, and a multi-player storage means for storing scores earned by said multiplicity of players normally connected to said computation means and to said binary electronic counter for providing the stored score of each player to saidcomputation means when said counter
indicates the identification of the player. 33. An apparatus for scoring a bowling game wherein a multiplicity of players bowl, comprising: means for receiving pinfall information for a multiplicity of players, an electronic computation meansfor computing bowling scores to be printed for said multiplicity of players connectable to said receiving means, a multi-player electronic storage means for storing scores earned by said multiplicity of players connectable to said computation means, anelectronic code indicating means connectable to said storage means and adapted to be connected to a printer to produce electronic signals usable for the control of a printing means, and an electronic control means connected to said computation means fordirecting the computation of bowling scores to be printed and connectable to said indicating means for directing the producing of electronic signals usable for the control of a
printing means. 34. An apparatus for scoring a bowling game wherein a multiplicity of players bowl on a plurality of bowling lanes, comprising: means for receiving pinfall information for a multiplicity of players bowling on a plurality oflanes, means for matching pinfall information with a player's identification, a single computation means for computing bowling scores for said multiplicity of players connectable to said receiving means, a multi-player storage means for storing scoresearned by said multiplicity of players connectable to said single computation means and connected to said matching means to supply a player's score to said computation means after said matching means matches a player's identification to pinfallinformation recorded by said receiving means, and a control means connected to said single computation means for directing the computation of bowling scores for each of the players. .[.35. An apparatus for scoring a bowling game having a multiplicityof scoring frames in which pinfall occurs from the rolling of at least one bowling ball, comprising: electronic means for receiving pinfall information, a computation means connectable to said electronic pinfall receiving means, an electronic storagemeans for storing scores earned by a player as a bowling game progresses connectable to said computation means, and electronic control means connected to said computation means for directing the computation of bowling scores..]. .[.36. An apparatus forscoring a bowling game having a multiplicity of scoring frames in which pinfall occurs from the rolling of at least one bowling ball, comprising: means for receiving pinfall information, a computation means connectable to said pinfall receiving means andincluding electronic means for adding pinfall to a stored score to produce a new score, an electronic storage means connectable to the electronic adding means to supply a stored score, and a control means connected to said computation means for
directing the computation of bowling scores..]. 37. In a bowling scoring apparatus for computing the computation bowling scores of a plurality of players for each frame in a bowling game wherein the scores are based upon pinfall earned andbonus values for strikes and spares, the combination of means for providing pinfall information relative to each of said plurality of players; a single counting register comprised of a plurality of bi-stable electronic elements, said register having atleast one input for receiving said pinfall information and for receiving cumulative score information relative to each of said plurality of players; a multi-player electronic memory comprised of a multiplicity of bi-stable bits, said multiplicity ofbits forming a plurality of words, one for each of said plurality of players, each word being adapted to contain cumulative score and computation control information based upon the past pinfall history of the player for its associated player; a singlecomputation control register comprised of a plurality of bi-stable electronic elements for receiving said computation control information relative to each of said plurality of players; means for reading the contents of a selected one of said pluralityof words in said memory corresponding to a selected one of said plurality of bowlers into said registers so that said cumulative score information will be placed in said counting register and said computation control information will be placed in saidcomputation control register; means, including a first electronic gating circuit, responsive to the computation control information in said computation control register for causing the addition of said pinfall information to aid cumulative scoreinformation for each of said plurality of players in said counting register including bonus values for strikes and spares in accordance with said computation control information to compute the updated cumulative score for each frame for the correspondingone of said plurality of bowlers; means, including a second electronic gating circuit, responsive to said computation control information and to said pinfall information for updating the computation control information for each of said plurality ofplayers whereby the updated computation control information may be subsequently used to direct subsequent computation; and means for writing said updated cumulative score and said updated computation control information into the memory word for thecorresponding one of said plurality of players whereby the information may be subsequently utilized in the computation of subsequent cumulative scores
for the corresponding player. 38. A bowling scoring apparatus that is suited for simultaneous computing of bowling scores of bowling games rolled on a plurality of lanes according to claim 37 further including a plurality of said pinfallinformation providing means, one for each of said plurality of lanes, each of said pinfall information providing means being operable after each ball is rolled on the corresponding lane, means for operating said reading means after each operation of anyone of said plurality of pinfall information providing means so that computation may take place as required; and means for operating said writing means after each operation of said reading means to preserve the information in said registers in saidmemory for use in subsequent computation whereby said registers may be cleared without destroying information in readiness to accept information relative to another player bowling on another lane.
A bowling scoring apparatus according to claim 37 further including bowling score error correction means; said error correction means comprising: means for selecting the word in the memory corresponding to the player whose bowling score is tobe corrected and for causing said reading means to read said selected word into said registers, means for entering correct bowling score information into said registers, and means for causing said writing means to write said selected word containing saidcorrect bowling score information into said memory whereby said corrected
bowling score information may be used for subsequent computation. 40. In a bowling scoring device for simultaneously computing bowling scores achieved by a plurality of players bowling on a plurality of lanes, the combination of: means forproviding pinfall information after each ball is rolled relative to each of said plurality of bowlers bowling on each of said plurality of lanes; computation means connectable to said pinfall information providing means for computing the bowling scoresof each of the plurality of players: memory means including means associated with each of said plurality of players for storing information relative to the past history of the bowling game bowled by each respective one of said plurality of players; asingle control means for receiving past history information after each ball is rolled and for actuating said computation means to cause the latter to perform such computation as may be required by said past history information after pinfall informationis provided after each ball is rolled; player identification means for associating pinfall information with the player achieving the same; and means associated with said player identification means for providing said single control means with the pasthistory information from said storing means that corresponds to the player whose pinfall information has been provided by said pinfall information providing means after each ball is rolled, whereby pinfall information of one player may be processed bysaid scoring device after another player has rolled a first ball in a frame and before
said another player has rolled a second ball in a frame. 41. The bowling scoring device of claim 40 further including a plurality of temporary storage means, one for each of said plurality of lanes, for storing first ball pinfall informationfor subsequent use in the event an illegal ball is rolled as the second ball in a frame, said temporary storage means being connected to said pinfall information providing means and
connectable to said computation means. 42. The bowling scoring device of claim 40 wherein said past history information is stored as one of at least the following states of a player's game--
first: ball following an open frame
second: first ball following a single strike
third: second ball in an open frame (if not preceded by a strike
fourth:first ball following two strikes
fifth: second ball in a frame following a strike
sixth: first ball following a spare
said scoring device further including means for receiving said pinfall information and said past history information in the form of one of said states and for updating said state after each ball bowled by a player for subsequent use in directingcomputation of that player's score following
the rolling of the next succeeding ball by that player. 43. The bowling scoring device of claim 42 wherein said updating means comprises an electronic gating matrix having inputs for receiving signals representative of the existence of any oneof said states and a signal representative of a pinfall of ten, and outputs for providing signals representative of the updated state. .[.44. In a bowling scorer for calculating scores of a bowling game wherein balls are rolled during each of asuccession of scoring frames, the combination of: a means for receiving pinfall information, means for totalizing pinfall fall information connected to said pinfall receiving means, and means for producing frame and total game scores connected to saidtotalizing means, said totalizing means and said score producing means comprising
semiconductor electronic elements..]. 45. The bowling scorer of .[.claim 44.]. .Iadd.claim 48 .Iaddend.further including a memory having a code word for each of a multiplicity of players of which a portion of each word is a player'sidentification code, means for selecting an identification code of a player, and a comparator for comparing the identification code selected by said selecting means and the identification code portion of
each of said code words. 46. A bowling scorer as specified in claim .[.44.]..Iadd.48.Iaddend., wherein said score producing means includes means for producing individual ball scores for both the first and second
balls rolled during each frame. 47. A bowling scorer as specified in claim .[.44.]..Iadd.48.Iaddend., wherein said score producing means includes means for producing ball scores, frame scores, total game scores, and
total team scores. 48. .[.A bowling scorer as specified in claim 44, wherein.]. .Iadd.In a bowling scorer for calculating scores of a bowling game wherein balls are rolled during each of a succession of scoring frames, the combination of: ameans for receiving pinfall information, means for totalizing pinfall information connected to said pinfall receiving means, and means for producing frame and total game scores connected to said totalizing means, said totalizing means and said scoreproducing means comprising semiconductor electronic elements .Iaddend.said totalizing means .[.includes.]. .Iadd.including .Iaddend.a memory containing a code word for each one of a multiplicity of players and a single computing unit connected to saidmemory to receive any one of said words for totalizing pinfalls for each of said multiplicity of players.
A bowling scorer as specified in claim 48, wherein each said word contains the determinable earned score of a player at a given point in a bowling game and an instruction for subsequent computation of a score; and said computing unit isconnectable to said memory to receive at least one of said words for totalizing pinfall counts in accordance with the instruction of said word; and wherein said score producing means includes means for computing a new instruction; and means forreturning said one
word to said memory. 50. The bowling scorer of claim 48 wherein said memory is an electronic serial memory containing a binary code word for
each one of a multiplicity of players. 51. A bowling scorer as specified in claim 50, wherein said totalizing means includes an electronic serial register connected to said memory to receive said words sequentially and means for sequentiallyshifting said words from said memory to said register and from said register to said memory. |
| Description: |
The present invention relates to automatic bowling scorers and more particularly to electricalbowling scoring devices capable of producing information required for a complete bowling score sheet.
In the past, bowling score devices of electrical-mechanical construction had been devised to permit the automatic calculation and display of only part of the bowling score information which is normally manually placed upon a score sheet duringthe progress of a bowling game. These devices have contained only the score at a particular point in the game rather than providing information for a complete score sheet. These devices have not accurately calculated and displayed all of the specialmarks associated with the bowling game such as strikes, spares, fouls, ball scores, and team mark totals. For the purpose of official league bowling contests, it is particularly desirable that a complete bowling score sheet be produced and be in a formwhich can be preserved for an indefinite period of time as a permanent record of a game. The present invention overcomes the limitation of past scorers in that it does for the first time compute and provide all the necessary scoring information that isrequired to print a complete bowling score sheet.
As is well known to those skilled in the art, both mechanical computers and electrical-mechanical computers require a substantial amount of preventative maintenance and are subject to definite reliability limitations. The recent rapidadvancement in the semiconductor electronic art has made it possible to produce computer elements which require substantially no preventative maintenance and have a much higher reliability than either mechanical or electrical-mechanical devices. Thepresent invention reduces preventative maintenance to a minimum and increases the reliability of a scorer over devices presently utilized in the art by providing a scorer which is constructed almost entirely of semiconductor electronic elements.
In the past, it has been necessary to provide a separate score computer for each bowling lane or pair of lanes with a score totaling register in each such computer for each player participating in a game. The present invention overcomes thesepast limitations by providing an electronic scorer which is capable of computing the scoring in a multiplicity of bowling games which are simultaneously occurring on a number of bowling lanes. In addition, the present invention overcomes the necessityof providing a number of totalizing registers by a construction which requires only one totalizing register and a storage memory which stores a code word for the scoring information that is associated with each player as the bowling game progresses.
It is, therefore, an object of the present invention to provide a new and improved automatic scorer.
Another object is to provide a completely electrical bowling scorer.
A further object of the present invention is to provide an electrical scorer for computing bowling scores and special marks which consists almost entirely of semiconductor electronic elements.
An additional object is to provide a bowling scorer which totalizes pinfalls to produce bowling scores in a single register for a multiplicity of players.
A principal object of the present invention is to provide an electronic scorer wherein the status of each player's game and his determinable earned score at any such status of the game are recorded in a code word with an identification for theplayer which may be transferred between an operating register and a memory.
Still another object is to provide a computer for a bowling scoer which will compute all of the scores and marks which are necessary to produce a complete bowling score sheet in accordance with the American Bowling Congress rules.
Another principal object of the present invention is to provide a computer in a bowling scorer which will provide sufficient information for a printing device to directly print a bowling score sheet with all of the required scores and specialmarks as a bowling game progresses.
Still another object is to provide a bowling scorer which is capable of separately processing the score resulting from the pinfall of each ball rolled on a lane and switching to process other scores resulting from pinfall on another lane betweenthe processing of the scores of a player's first ball and second ball pinfall in any frame of play on the aforementioned lane.
A still further object is to provide a bowling scorer capable of processing scores resulting from the simultaneous bowling on two lanes of two members of a single team.
An additional object is to provide a bowling scorer that utilizes a stored state of a player's game, frame and ball indication, player's earned score and pinfall count from the most recently rolled ball to selected one or more formulas forcomputing frame, mark and team total scores.
A further object is to provide a bowling scorer that sequences bowling lanes between games during team play.
Another object is to provide a scorer which completes a full cycle of score computation resulting from the roll of a ball following an electrical power failure during the cycle in order to prevent any loss of scoring information.
A still further object is to provide a first and second ball indicator in a bowling scorer.
Yet another object of the present invention is to provide an electrical scorer which can compute bowling scores including all ball, frame, special marks, and total scores for a multiplicity of bowlers playing games simultaneously on a pluralityof bowling lanes.
Further objects and advantages will become apparent from the following detailed description taken in connection with the accompanying drawings, in which:
FIG. 1 is a perspective view of a computer portion of an embodiment of the present invention;
FIG. 2 is a perspective view of the portion of the computer shown in FIG. 1 and other units comprising an embodiment of the invention;
FIG. 3 is a perspective view of a test panel forming a portion of the computer portion illustrated in FIG. 1;
FIG. 4 is a block diagram of the principal circuits of the embodiment of the present invention illustrated in FIGS. 1-3;
FIG. 5 is a schematic diagram of a NAND gate utilized in the embodiment of the invention illustrated in FIGS. 1-4;
FIG. 6 is a logic circuit symbol representing the NAND gate circuit illustrated in FIG. 5;
FIG. 7 is a schematic drawing of an AND gate utilized in the embodiment of the invention illustrated in FIGS. 1-4;
FIG. 8 is a logic circuit symbol representing the AND gate illustrated in FIG. 7;
FIG. 9 is a schematic drawing of a binary counter circuit utilized in the embodiment of the invention illustrated in FIGS. 1-4;
FIG. 10 is a logic circuit symbol representing the binary counter illustrated in FIG. 9;
FIG. 11 is a schematic drawing of another binary counter utilized in the embodiment of the invention illustrated in FIGS. 1-4;
FIG. 12 is a logic circuit symbol representing the binary counter illustrated in FIG. 11;
FIG. 13 is a schematic drawing of a delay multivibrator utilized in the embodiment of the invention illustrated in FIGS. 1-4;
FIG. 14 is a logic circuit symbol representing the delay multivibrator illustrated in FIG. 13;
FIG. 15 is a schematic drawing of an AC bistable multivibrator utilized in the embodiment of the invention allustrated in FIGS. 1-4;
FIG. 16 is a logic circuit symbol representing the AC bistable multivibrator illustrated in FIG. 15;
FIG. 17 is a schematic drawing of a simple bistable multivibrator utilized in the embodiment of the invention illustrated in FIGS. 1-4;
FIG. 18 is a logic circuit symbol representing the simple bistable multivibrator illustrated in FIG. 17;
FIG. 19 is a schematic drawing of a power amplifier utilized in the embodiment of the invention illustrated in FIGS. 1-4;
FIG. 20 is a logic circuit symbol representing the power amplifier illustrated in FIG. 19;
FIG. 21 is a schematic drawing of a universal bistable multivibrator utilized in the embodiment of the invention illustrated in FIGS. 1-4;
FIG. 22 is a logic circuit symbol representing the universal bistable multivibrator illustrated in FIG. 21;
FIG. 23 is a schematic drawing of a shift register utilized in the embodiment of the invention illustrated in FIGS. 1-4;
FIG. 24 is a logic circuit symbol representing the shift register illustrated in FIG. 23;
FIG. 25 is a functional diagram of a multivibrator clock utilized in the embodiment of the invention illustrated in FIGS. 1-4;
FIG. 26 is a logic circuit symbol representing the multivibrator clock illustrated in FIG. 25;
FIG. 27 is a schematic drawing of a solenoid driver utilized in the embodiment of the invention illustrated in FIGS. 1-4;
FIG. 28 is a logic circuit symbol representing the solenoid driver illustrated in FIG. 27;
FIG. 29 is a schematic diagram of a player's sequencer shown in FIG. 4;
FIG. 30 is a schematic diagram of a pinfall sequencer shown in FIG. 4;
FIG. 31 is a schematic diagram of a comparator shown in FIG. 4;
FIG. 32 is a schematic diagram of a shift counter shown in FIG. 4;
FIG. 33 is a schematic diagram of an out-of-turn unit shown in FIG. 4;
FIG. 34 is a schematic diagram of a memory shown in FIG. 4;
FIG. 35 is a schematic diagram of a memory reset unit shown in FIG. 4;
FIG. 36 is a schematic diagram of a state changing section of a state and output control unit shown in FIG. 4;
FIG. 37 is a procedure diagram illustrating the relationship of various operating procedures performed by the state and output control unit shown in FIG. 4;
FIG. 38 is a schematic diagram of a detection section of the state and output control unit shown in FIG. 4;
FIG. 39 is a schematic diagram of a score section of an arithmetic unit shown in FIG. 4;
FIG. 40 is a schematic diagram of a box-frame location and player identification section of the arithmetic unit shown in FIG. 4;
FIG. 41 is a schematic diagram of an advanced frame mark total register section of the arithmetic unit shown in FIG. 4;
FIG. 42 is a schematic diagram of a first and second ball section of the arithmetic unit shown in FIG. 4;
FIG. 43 is a schematic diagram of a timing unit shown in FIG. 4;
FIG. 44 is a schematic diagram of an output unit shown in FIG. 4;
FIG. 45 is a schematic diagram of an output indicator unit shown in FIG. 4; and
FIG. 46 is a schematic diagram of a power unit shown in FIG. 4.
While this invention is susceptible of embodiment in many different forms, there is shown in the drawings and will herein be described in detail an embodiment of theinvention with the understanding that the present disclosure is to be considered as an exemplification of the principles of the invention and is not intended to limit the invention to the embodiment illustrated. The scope of the invention will bepointed out in the appended claims.
______________________________________ TABLE OF CONTENTS Column ______________________________________ Structure 5 Major Units 8 Logic Circuits 11 NAND gate 11 AND gate 12 Binary Counters 12 Delay Multivibrator 14 AC BistableMultivibrator 14 Simple Bistable Multivibrator 15 Power Amplifier 15 Universal Bistable Multivibrator 15 Shift Register 16 Multivibrator Clock 16 Solenoid Driver 16 Player Sequencer 17 Pinfall Sequencer 23 Comparator 27 Shift Counter 28 Correction and Out-of-Turn Unit 31 Memory Circuits 33 Memory Reset Unit 34 State and Output Control Unit 35 Arithmetic Unit 42 Timing Unit 55 Output Unit 56 Output Indicator Unit 60 Power Circuits 62 Scorer Operation 64 Placing the Scorer inStandby Condition 64 Placing the Scorer in Operating Status 64 First Ball Following an Open Frame 67 First Ball Following a Single Strike 69 Second Ball Following an Open Frame 70 First Ball Following Two STrikes 71 Second Ball Following aStrike 73 First Ball Following a Spare 75 Stop State 77 Out of Turn Bowling 79 Correction Procedure 80 De-energizing the Scorer 80 ______________________________________
In the prior art devices, it has been customary to provide a mechanical or an electrical-mechanical register for totalizing pinfall to arrive at a total score for each individual player at any point in a bowling game and to provide additionalregisters which indicate the point to which each player has progressed in the game. Thus, in the prior devices, it was necessary to have a totalizing register for each player on each and every alley and to provide a register or similar device for eachplayer to keep track of his individual progress in the game. Thus, at least two register-type devices were required for each and every player. In the present invention, a single operating register is used for totalizing pinfall for multiplicity ofplayers playing simultaneously on a plurality of bowling lanes. Therefore, the weight, size, and complexity of the totalizing register system are greatly reduced as compared to the prior art devices. For the purpose of illustration, an embodiment ofthe present invention is shown in the drawing; which can accommodate up to a maximum number of six players for each of two bowling teams alternatively on two bowling lanes. As each frame score is totalized in the operating register for a player and aseach team's total score is totalized in the same register, an output unit may provide suitable score and positioning control signals to any output indicator such as a projection display device or a printer which prints a bowling score sheet. Thecomputer also produces a mark total as the game progresses which may be sent by the output unit to a projection display device or the printer.
The single register must contain the proper code word for each individual player at the time the computer attempts to add further pinfall data to the code word in the register. In order to provide for the storage of the code words upon whichcomputations are not momentarily being made, an electronic memory is connected to the register from which a shift control may transfer the code words to the register as they are called for by various player indicating units.
STRUCTURE
Referring first to FIGS. 1, 2, and 3, a housing cabinet 20 contains an electric bowling score computer and has a door 21 which provides access to a power supply panel 22 and a door 23 which provides for access to a test panel 24 and a comparatortester panel 25 shown in FIG. 3. An access opening 26 in the top of the cabinet is provided with a removable transparent glass panel 27 provided for observation of a large number of the printed circuit boards which constitute the electronic circuits ofthe computer. The cabinet top is hinged at the back and opens to permit servicing. A control panel 28 is secured to the front of the cabinet 20 and is supported by support members 29 and 30.
Referring now in particular to FIG. 1, an AC power switch 36 is mounted near the top of panel 22 for energizing a main power supply of the computer and three DC current power switches 32, 33, and 34 are mounted side-by-side in the center of panel22 for the purpose of energizing a plus 12 volt series of output terminals, a minus 6 volt series of output terminals, and a minus 18 volt series of output terminals on a terminal board 35. The switch 36 is normally in an "ON" position at all timessince the power supply is usually controlled by a main power switch 31. Suitable cables (not shown) are connected to these terminals for the purpose of supplying plus 12 minus 6, and minus 18 volts to various binary computer components utilized in thecoupling circuits of the computer as will be presently described in detail. The main power switch 31 is provided to energize components requiring alternating current in the computer scorer by energizing the main power supply. An AC indicator lamp 42 islit when the switch 36 and switch 31 are in their "ON" positions. An input fuse holder 44 is installed in panel 22 to provide easy access to a fuse which protects the main power supply which is energized by switch 36. A DC fail light 39 is provided toindicate failure of any of the DC outputs of the main power supply. An additional terminal board 43, used for memory inputs, outputs and voltages, is provided on the power supply panel 22 to which are connected groups of cables 37 and 38. In the upperleft-hand corner of panel 22 is located a memory power "ON" switch 40 and a "PRIME CURRENT ADJUST" knob 41 for the purpose of supplying power to an electrical serial memory and to adjust the prime current thereto, respectively, as will be presentlydescribed in greater detail.
Referring now specifically to FIG. 2, a computer "POWER OFF-ON" switch 45, and a "LEAGUE-OPEN BOWL" switch 46 are provided at the top of a panel portion 47 located centrally in the control panel 28 to allow an operator to energize the scorer andto select either league or open bowling. Since the embodiment of the invention being presently described is designated to compute scoring on two lanes, these lanes may be used either for open bowling where a bowler remains on the same lane for an entiregame or in league play where a bowler alternates with his team between lanes with each new frame of the game. Thus, by the proper positioning of switch 46, the scorer will be set for league or open bowling as desired. Below these switches on the panelportion 47 are located an "OUT-OF-TURN PLAYER LANE" switch 48 and a rotating "OUT-OF-TURN PLAYER" selector thumbwheel switch 49 which are utilized to indicate to the scorer which bowler is bowling out-of-turn and on which lane he is bowling. Selectorthumbwheel switch 49 is also used in making corrections.
A Team A panel portion 50 has mounted thereon a "START GAME" switch 51 and a "TEAM SIZE" selector switch 52, and a Team B panel portion 53 has mounted thereon a "START GAME" switch 54 and a "TEAM SIZE" selector switch 55. Whenever a team inleague bowling is ready to start their game, they push their appropriate "START GAME" switch and set their "TEAM SIZE" selector switch to the number of players on their team.
A lane 1 panel portion 56 has a push button "SKIP NEXT BOWLER" switch 58 mounted thereon and a lane 2 panel portion 58 has a press "SKIP NEXT BOWLER" switch 59 mounted thereon. Whenever a bowler who should be the next bowler to bowl in normalsequence on a particular lane is not going to bowl in his proper turn for some reason, the "SKIP NEXT BOWLER" switch for the appropriate lane is pressed so that the computer may go on to scoring the pinfall of a subsequent bowler as will be described ingreater detail presently.
A cover plate 60 is hinged at 61 so that it will normally cover a score correction panel 62 as shown in FIG. 1. Cover plate 60 is shown turned down in FIG. 2 to reveal the correction panel portion 62. As shown in FIG. 2 mounted in thecorrection panel portion 62 is a frame thumbwheel switch 63 for indicating a last correct printed frame, a series of three thumbwheel switches 64 for indicating a last correct printed score, a pinfall thumbwheel switch 65 for indicating a correct pinfallcount, and a "MAKE CORRECTION" push button switch 66 which is constructed of a yellow transparent material and has a light positioned behind to illuminate it, and a green "ALL CORRECTIONS COMPLETE" lighted panel switch 67. All of the switches areutilized in correcting a printed or displayed score if such should be necessary. Their utilization in the circuits of the scorer will presently be described in detail.
Placed on top of the computer cabinet 20 in FIG. 2 are an input panel 70, a judge's foul control box 80, and an output indicator unit 90. Mounted on the front of the panel 70 are a pair of telephone dial switches 71 and 72 for indicating pinfallon lane 1 and lane 2, respectively. Between these telephone dial switches are mounted a "PRESS TO SIGNAL FOUL, LANE 1" switch 73, a "PRESS TO SIGNAL FOUL, LANE 2" switch 74, and a "PRINT COMPLETE" press switch 75. Both press switches 73 and 74 are ofthe illuminated panel type having illuminted lamps positioned therebehind. An "AUTOMATIC-MANUAL" switch 76 is mounted on the simulator to indicate whether the "PRINT COMPLETE" signal is to be generated by the scorer internally or by the manuallyoperated "PRINT COMPLETE" switch 75. The manually operated switch may be replaced by an external source such as a printer or pinsetter. In the present embodiment, the switch 75 is connected to generate this signal when switch 76 is in its "MANUAL"position.
The judge's foul control box 80 has a lane 1 four panel on which is mounted a green illumination panel 81 with a light behind it which is switched on when a possible four has been indicated and a "TRUE-FALSE DECISION" switch 82 and a lane 2 foulpanel having a similar green illumination panel 83 with a foul light and a similar "TRUE-FALSE DECISION" switch 84. When a possible foul has been indicated automatically on a lane, the respective panel 81 or 83 will be illuminated and a judge willdecide whether it was a true or a false foul and indicate his decision by switching the appropriate switch 82 or 84 to its "TRUE" or "FALSE" foul indication position.
An output indicator unit 90 has a front panel with apertures 92, 93 and 94 therein through which are displayed a player's ball, frame or total score or a team total score by a set of three self-decoding binary-to-decimal read-out units mountedbehind a panel portion 91. An indicator light panel 95 indicates whether a box score or other score is appearing in apertures 92-94. A light indicator panel 96 indicates that a strike or a spare has been made when it is illuminated. An aperture 97 hasa self-decoding digital decimal read-out unit indicating the vertical position (player number) on the score sheet of the score appearing in apertures 92-94 and an aperture 98 has another self-decoding digital decimal read-out unit displaying the framenumber to which the score appearing in apertures 92-94 applies. A pair of light panels 99 for Team A and Team B indicate to which team the information appearing in the various apertures (and lights) on panel 91 apply.
The scoring computer housed in cabinet 20 can receive inputs from an automatic detection device mounted on an automatic pinsetter or at another position where it can detect the number of pins downed following the roll of the ball and provide apulse for each pin downed. In the embodiment of the invention shown in the drawings, the input panel 70 is the system for supplying pinfall to a computer. It is a manually operated device which may be continuously utilized in lieu of an automaticdetection device or only as test equipment for checking the operation of the scorer. The output indicator unit 90 may be used as a normal display or only as a method for checking the output signals of the computer. These signals may be used to displaythe score of a game as it progresses on a score sheet type score board or operate a printer to print a complete bowling score sheet. Thus, the output indicator unit 90 is not in itself a complete score sheet display device but it does simulate a scoresheet type display or a printer for printing a complete score sheet in that it utilizes all the signals which the computer must provide to control such devices and does display the information on its panel which these devices would display. It differsfrom these devices in that the scores and other information displayed on its panel are removed as new scores are computed so that they may, in turn, be displayed thereon rather than forming a permanent record of all information computed and read out ofthe electronic scoring computer in cabinet 20. Thus, output indicating unit 90 forms a compact output test unit for the computer and an indicator which displays score information that can be manually copied onto a score sheet.
Referring now specifically to the test panel 24 illustrated in FIG. 3, a series of twenty-two neon lamps 201-222 are mounted across the top of the panel to display the binary word contained in an operating register SR which is connected to anarithmetic unit 10 and a state and output control unit 17 as indicated in FIG. 4. The neon lamps are labeled SR-1 to SR-22 to indicate the number of the bit position in the operating register. Each lamp is connected to an output point of one of a setof twenty-two multivibrators, whose label it bears. These multivibrators compose the operating register of twenty-two bit positions. Each lamp will be lit whenever the corresponding multivibrator contains a binary one. A press switch labeled "SETSR-1" 223 is located on the panel immediately below the SR-1 neon lamp 201. In like manner, a series of four press switches 224-227 labeled "SET SR-19, SET SR-20, SET SR-21, and SET SR-22", respectively, are located below the set of corresponding neonlamps 219-222. The five aforementioned press switches enable loading of information into the operating register. Each is connected to the multivibrator whose label it bears in a manner that will place a binary one in the multivibrator when the switchis pressed. By pressing the appropriate switches 219-222 for each binary one in a player's or team's identification binary code, each word may be identified thereafter with a particular player or team. A DC voltmeter is mounted in the upper right-handcorner of panel 24 to record the internal voltages applied to different points of the computer as selected by a selector switch 229 located directly below the voltmeter. Across the center of the panel are a number of switches which are utilized inproperly loading a memory unit of the computer as will presently be described. These switches are a press switch 230 labeled "INITIAL RESET," a press switch 231 labeled "MEMORY RESET," a toggle switch 232 labeled "EQUAL," a press switch 233 labeled"INCREMENT FRAME," a press switch 234 labeled "SHIFT ONE WORD," a press switch 235 labeled "SHIFT ONE BIT," and a press switch 236 labeled "INTERRUPT PRIME CIRCUIT."
Across the bottom of panel 24 are a series of neon lights which indicate certain operations are occurring in the computer. These are a "PINFALL READY" light 237, an "EQUAL" light 238, a "TEAM TOTAL" light 239, a "TEAM A TEAM TOTAL" light 240, a"TEAM B TEAM TOTAL" light 241, a "TEAM OR MARK TOTAL" light 242, a "PRINT MARK TOTAL" light 243, an "END COMPUTATION" light 244, an "ADD COMPLETE" light 245, a "MARK TOTAL" light 246, a "PRINT BOX SCORE" light 247, a "PRINT SCORE" light 248, a "SHIFTCOMPLETE" light 249, a "MEMORY DRIVER" light 250, a set of four pinfall count lights 251-254 labeled "1, 2, 4 and 8" to indicate their respective binary weights, and a set of four "COMMAND PLAYER IDENTIFICATION" lights 255-258 which are labeled "8, 4, 2,and 1," respectively, to indicate their binary weights. Lights 237 through 250 are connected in the circuits of the scorer so that they are lit when the respective labeled operations are in progress. Lights 251-254 are connected to a binarycounter-register composed of multivibrators 1001-1004 in arithmetic unit 10, and lights 255-258 are connected to thumbwheel 49 so that they indicate the presence of a binary one in the respective components. In the lower right-hand corner of panel 24are located two test points 259 and 260 and a voltage indicator light 261.
The comparator tester panel 25 is not a portion of the present invention, but has been indicated on the drawing to show that space is reserved within the scoring computer cabinet 20 for the installation of such a device.
MAJOR UNITS
With the aid of FIG. 4, the major units of the scorer will be described prior to a detailed circuit description of any particular unit. FIG. 4 indicates the units contained within the housing cabinet 20 by enclosing them within a dashed line. The input panel 70, the judge's foul control box 80, and the output indicator unit 90 are the only units of the scorer outside the cabinet 20. The central units of the computer are the operating register SR, the arithmetic unit 10 and the state andoutput control unit 17. The operating register SR consists of twenty-two bistable multivibrators SR-1 to SR-22 for holding a twenty-two bit binary word. They are shown in detail in FIGS. 36, 39, and 40. The state and output control unit 17 isconnected to the first three multivibrators SR-1 to SR-3, and the arithmetic unit 10 is connected to the last nineteen multivibrators SR-4 to SR-22. The arithmetic unit 10 contains the necessary computing circuitry to add a correct multiple of a pinfallcount for either or both a first and second pinfall of any given frame. In order to provide a counter for totalizing the number of pins downed by each ball rolled, a suitable detection device is placed, either in an automatic pinsetting machine or atsome other location in the vicinity of each pin to detect the fact that that particular pin has been knocked down following the rolling of a ball, or the input panel 70 is manually operated. Upon detecting a downed pin, each individual detecting devicewill provide a pulse which may be transmitted to a pinfall sequencer unit 12. The automatic pinfall detectors may be of any conventional design presently utilized in the art, such as microswitches on the pinsetter which will actuate circuitry to providea pulse when the detectors are sequentially sampled following the rolling of a bowling ball. Therefore, a pinfall detection system or a pinfall simulator of any conventional design which will send a series of one to eleven pulses to the pinfallsequencer 12 may be employed. The input panel 70 provides this function in FIG. 4. Sequential pulses are produced by manually operated telephone switches mounted on the panel. A variation between one to eleven pulses is required to record zero to tenpins downed as a result of the rolling of each ball, a single pulse being the indication that no pins were downed. A counter in the pinfall sequencer 12 totalizes the number of pulses received as a result of each pinfall and stores this informationuntil required by the arithmetic unit 10.
A player sequencer 11 determines which bowler is bowling on each lane. When a series of pinfall pulses are received from the lane-pair simulator 70 in the pinfall sequencer 12, this sequencer takes cognizance of the lane from which the pinfallwas received and sends this information to the player sequencer 11. The player sequencer 11 sends the player's identification for the player bowling on that lane to a comparator 13. The comparator 13 receives from the operating register SR the identityof the bowler's code word in the operating register and compares it to the identity of the bowler received from the player sequencer 11. If the two identities are the same, no further action is taken by the comparator. However, if they are notidentical, the comparator sends an actuation signal to a shift counter 14 which in turns sends a shift signal to the arithmetic unit 10 and a magnetic core memory 15. The operating register SR and the magnetic core memory 15 are serially connected in aloop with a memory output waveshaper 15a and a memory input driver 15b in order that three hundred fifty-two binary bits from sixteen words of twenty-two bits each. The shift counter counts the number of bits in a code word until a new code word is inthe operating register and then stops the shifting of code words from and to the register. The identity portion of the new code word in the register is then sent to the comparator 13 to compare it with the identity received from the player sequencer 11. By this means, the code words in the register of the arithmetic unit 10 are shifted sequentially until a code word arises in the register which is identical to the one being called for by the player sequencer 11. The words received by the register inthe arithmetic unit 10 are shifted bit-by-bit back into the serial memory 15 as each subsequent word is shifted into the register. The cooperating operation of the arithmetic unit 10 and the memory 15 will be described in greater detail presently.
The code word provided for each player is twenty-two bits in length and utilizes standard binary form. The first four bits of a word carry the player's identification. An additional ten bits indicate the player's score after the crediting ofthe last ball rolled. Five of the remaining eight bits serve to indicate which ball is to be rolled next; the last three bits indicate the state after the last ball, which is used to aid in determination of the scoring of the next ball.
The player sequencer 11 determines the number of the player bowling on a particular lane as long as all players bowl in proper order. In order to provide for the identification of a player who is bowling out-of-turn and to correct the score ofany player whose scores might have been incorrectly computed, a correction and out-of-turn unit 16 is utilized to override the player sequencer 11 and send a signal to the comparator 13 containing the identification of a player who is bowlingout-of-turn, or it may send the identification of a player whose score is to be corrected on the score sheet.
Whenever a word is held in the register SR as commanded by either the player sequencer 11 or the correction and out-of-turn unit 16, the state and output control unit 17 receives the coded state from the code word. In turn, it actuates circuitsin the arithmetic unit 10 which properly credit the pinfall resulting from the rolling of a player's latest ball. The score portion of the word is then modified to indicate the proper new score, and the ball and frame portion is modified to indicate thecorrect new ball and frame number. The state and output control unit 17 also directs that the correct pinfall ball information be provided to an output unit 18. Thus, as each ball is rolled by a player, which results in the necessity to add a multipleof that ball pinfall to the player's score, the state and output control unit directs the circuits in the arithmetic unit to properly credit the pinfall, plus any bonus to the score. In the case of a first ball, it is not always appropriate to add thepinfall to the last frame score. In such a case the state and output control unit will command the arithmetic unit to wait until the second ball of the frame has been rolled and then to add the appropriate multiple pinfall resulting from both balls tothe previous frame score which is recorded in the word in the register. The computer is free to score other player's pinfall until the second ball is rolled. Appropriate ball and frame and total score data are provided by the operating register SR tothe output unit 18. Ball-by-ball pinfall count information (box scores) is provided by the pinfall sequencer 12. At appropriate times, as commanded by the state and output control unit, frame position (horizontal position) information as well as playerand score information is provided to the output indicator unit 90. As aforementioned, the output indicator unit 90 may be replaced by a printer, which prints the scores directly on a score sheet, or by other display systems. The arithmetic unitcomputes scores in accordance with the computation instructions of the state and output control unit 17. The output unit 18 receives scoring data from the register SR and pinfall sequencer 12 and passes it on to the output indicator unit or otherdisplay system in accordance with the commands of the state and output control unit 17. Thus, the output unit 18 issues either a box score, a frame score, a mark total, or a team total score at the commands of the state and output control unit 17, andthe position data indicates the respective score sheet positions of each box, frame, mark total, or team total score. Player identification (vertical score position) and a "Print" (or display) signal is received by the output indicator unit 90 directlyfrom the state and output control unit 17. When the output indicator unit 90 receives the "Print" signal, it displays the score information available from the output unit 18 at the position indicated by the output unit 18 and the operating register SR.
In addition to the major units previously mentioned, the scorer has three supporting major units. These are a memory reset unit 15c, a timing unit 20a, and a power unit 19. The memory reset unit 15c sequentially calls the player and key wordsfor each team into the operating register SR and resets these words prior to beginning each game. The timing unit 20a provides the master timing pulses utilized by the other major components and also produced a number of "End Computation" signals. The"End Computation" signals are provided to a number of the other major units to indicate the completion of each computation cycle of the scorer. The power unit 19 contains both the normal power supply circuits for all of the units in the scorer and alsocontains an emergency battery power supply source which it utilizes to complete a computation cycle of the scorer whenever a power line interruption occurs. Unless a computation cycle is completed without power interruption, a portion of the scoringinformation may be lost. However, the power unit 19, by providing uninterrupted power to the other units of the scorer, assures that all scoring words are returned to the memory 15 where they are magnetically stored without loss even if the electricalpower remains off for a considerable period of time.
To broadly summarize the major units of the scorer, a means of supplying pinfall information is provided by the input panel 70, a means for receiving pinfall information is provided by the pinfall sequencer 12, a computation means is provided bythe arithmetic unit 10, a score storage means is provided by the combination of the memory 15, the operating register SR, the memory output waveshaper 15a and the memory input driver 15b a central means is provided by the state and output control unit 17and the output unit 18, and an indicating means is provided by the output indicator unit 90. In addition, a means for identifying players and lanes is provided by the player sequencer 11 and the correction and out-of-turn unit 16.
Logic circuits
A dozen binary logic circuits are utilized repeatedly throughout the embodiment of the invention shown in the drawings, FIGS. 29-46. Since most of these twelve logic circuits are utilized repeatedly, each of these circuits will not be describedtogether with the symbol representing it. The terminals of each symbol bear the same numbers as the terminals in the respective logic circuit. The logic circuits are shown in the odd-numbered figures from FIGS. 5-27, and their respective symbolicrepresentations are shown in the even-numbered figures between 6 and 28. Following the description of the logic circuits and the symbols representing them, the units shown in block form in FIG. 4 will each be described in detail utilizing these twelvelogic circuit symbols.
NAND GATE
FIG. 5 shows a NAND gate circuit which consists of two input diodes 301 and 302 having input terminals 303 and 304, respectively, which are connected to form an AND gate, the output of which is connected into a conventional transistor inverteramplifier generally indicated at 305. The transistor amplifier 305 includes a transistor 306 and an output terminal 307 connected to the collector of the transistor. Throughout the scorer, a binary one will be a minus six volts and a binary zero willbe zero voltage which is circuit ground. It will be recognized by those skilled in the art that whenever a minus six volts appears on terminals 303 and 304, the output appearing on terminal 307 is clamped through the transistor 306 to zero volt orbinary zero. However, when any of the input terminals 303 and 304 goes to zero volt or binary zero, the transistor 306 is turned "OFF" and the output voltage falls to the clamp voltage of minus six volts or binary one. Thus, the NAND gate performs thefunction of an AND gate followed by the inversion of the AND gate output. Since many of the elements constituting the various logic circuits such as the presently described NAND gate constitute basic circuit design well known to those skilled in theart, only the special features of these circuits will be described in complete detail.
FIG. 6 shows the symbol which represents the NAND gate whose circuit is shown in FIG. 5. The input terminals 303 and 304, the output terminals 307, and a mode terminal 308 bear the same terminal numerals as the terminals they represent in thecircuit of FIG. 5. Whenever a NAND gate or other logic circuit is represented by a symbol in the general circuit drawings of the scorer, the symbol will carry the same terminal as those shown in FIG. 6 so that the function of each terminal may bequickly identified by referring back to the appropriate logic circuit schematic drawing such as FIG. 5 for the NAND gate. The entire symbol for a logic circuit such as that of the NAND gate of FIG. 6 will bear a different numeral for each such circuitutilized in the scorer. Thus, the terminal 304, as identified by its position on the symbol of NAND gate 1211, refers to the second of the input terminals for a NAND gate which is distinctly identified by the numeral 1211. The terminal numeral willappear only on those symbols where it may be required to avoid confusion.
AND GATE
The AND gates utilized in the present scorer consist of diode clusters as are shown in FIG. 7. A series of diodes 310, 311, and 312 have their inputs connected to a series of terminals 315, 316, 317 and their output connected to a commonterminal 318. The AND gates shown in FIG. 7 will be recognized by those skilled in the art as being of conventional design except for the fact that they do not have the appropriate voltages applied thereto. In the present bowling scorer, AND gates areutilized principally in conjunction with a NAND gate of the type shown in FIG. 5 to increase the number of inputs to the AND gate portion of the NAND gate. This is accomplished by connecting the node output terminal 318 to the node terminal 308 of theNAND gate. Although three input terminals with their respective three diodes are shown in FIG. 7, any number of inputs and diodes up to and including eight may be formed into a diode cluster to increase the number of inputs to the NAND gate shown inFIG. 5.
The symbol for this AND gate is shown in FIG. 8 with the output node terminal shown as emerging from one side of the semicircular symbol. Thus, at frequent points throughout the electronic scorer, the symbol shown in FIG. 8 will have terminal318 connected to the terminal 308 of the symbol shown in FIG. 6 merely to increase the number of inputs which then would include 303, 304, 315, 316, and 317. Whenever the symbol shown in FIG. 8 is so used as an adjunct to the symbol of FIG. 6, bothsymbols will be often referred to as a single NAND gate having a single identification numeral.
BINARY COUNTER
A bistable multivibrator is frequently utilized as a binary counter for a single bit of standard binary code. A pair of transistors 320 and 321 are connected to form a conventional bistable multivibrator.
The bistable multivibrator circuit shown in FIG. 9 is essentially two NAND circuits interconnected to act as a multivibrator and provided with a complement input circuit so that they may be operated as a binary counter. A DC set terminal 322 isconnected through a diode to a resistor 323 and a diode 324 to the base of transistor 321 in order to turn "ON" that transistor. Transistor 321 has its collector connected to a set output terminal 325. In order to expand the number of input terminals,a DC set node terminal 326 is also connected to the base of transistor 321 through resistor 323 and rectifier 324. Diode clusters such as illustrated in FIG. 7 may be connected to terminal 326 to expand the inputs to a desired number. A DC resetterminal 327 is connected through a resistor 328 and a diode 329 to the base of the transistor 320 to turn this transistor "ON". A collector of transistor 320 is connected to a reset output terminal 330. A DC reset node 331 is also connected to thebase of transistor 320 through the resistor 328 and the diode 329 to provide additional reset input terminals when a diode cluster such as shown in FIG. 7 is connected to the reset node 331. In addition to these terminals, a complement input terminal332 is provided which is connected to a diode 333. Each pulse of a train of pulses received on terminal 322 will cause whichever transistor is conducting to be cut off and the other transistor to conduct, thereby causing the multivibrator to operate asa binary counter. The connecting complement network is of standard construction well known in the art. An additional complementary input terminal 334 is connected through a rectified 335 to a common junction point 336. Thus, the elements of terminal332, rectifier 333, terminal 334, rectifier 335, and common junction 336 form an AND gate or diode cluster equivalent to the circuit shown in FIG. 7.
FIG. 10 shows the symbol representing the bistable multivibrator circuit illustrated in FIG. 9. Corresponding terminals bear the same numerals. The complement input terminals 332 and 334 that are connected to form an AND gate are connected inthe symbol to a portion of a rectangle which has a semicircle 337 therein to indicate that the terminals 332 and 334 are joined together in an AND gate or diode cluster. In some of the bistable multivibrators constructed in accordance with the circuitof FIG. 9, terminal 334 and rectifier 335 are not included, leaving only a single complement input terminal 332 and its connected rectifier 333. In such instances the semicircle 337 is not found in the symbol for the circuit as illustrated in FIG. 10. Only the single complement input terminal 332 is shown. A rectifier symbol 338 is shown in FIG. 10 as being connected to terminal 322 to indicate that that terminal may be directly connected to an input wire from another logic circuit. Terminal 326 hasno such rectifier shown for its requires that it be connected to an external diode or diode cluster. In like manner, a rectifier 339 is connected to DC reset terminal 327 while no rectifier is shown connected to the DC reset node terminal 331.
Referring now to FIG. 11, another bistable multivibrator circuit is illustrated which is identical to the bistable multivibrator circuit of FIG. 9, except that the complement input circuitry to a pair of transistors has been modified in aconventional manner to accept a gated AC reset input circuit provided from gated input terminals 340 and 341.
The circuit illustrated in FIG. 11 has a set of terminals similar to those of FIG. 9 consisting of a DC set terminal 342, a DC set node terminal 343, a DC reset terminal 344, a DC reset node terminal 345, a complement input terminal 346, a resetoutput terminal 347, and a set output terminal 348. When either the terminal 332 or 334 in the circuit of FIG. 9 is at minus six volts (binary one) or open, a positive transition at the other input produces the same effect as a simple complement input. In this way, terminal 332 or 324 may be utilized as a simple complement input. When one of these inputs is at circuit ground (binary zero) a positive transition on the other input will have no effect. Thus, one terminal may be utilized to inhibit theinput received on the other terminal. The operation of terminals 340 and 341 and their associated circuitry illustrated in FIG. 11 differs from the circuitry shown in FIG. 9 in that a positive transition applied to either terminal 340 and 341 when themultivibrator is in the set condition will reset it. Inputs applied to terminal 346 are received by the multivibrator as simple complement inputs and the multivibrator will count up such pulses received on terminal 346 in the ordinary binary methol.
The symbol for the circuit illustrated in FIG. 11 is shown in FIG. 12. It is similar to the symbol shown in FIG. 10 except that the semicircle representing the gated complement inputs is not present since they are not utilized in the bistablemultivibrator of FIG. 11 and a semicircle 349 with a condenser symbol 350 has been added to indicate that terminals 340 and 341 are gated AC reset terminals.
The binary counters shown in FIGS. 9-12 are always arranged in either a three or four bit binary counter register. In the four bit register, three multivibrators are the type shown in FIGS. 9 and 10, and the fourth multivibrator is the "gatedreset type" shown in FIGS. 11 and 12.
DELAY MULTIVIBRATOR
FIG. 13 illustrates a one-shot multivibrator capable of generating pulses in a variety of widths which utilizes a pair of transistors 401 and 402 connected in a conventional one-shot multivibrator circuit. The circuit has an input triggerterminal 403 and an input node terminal 404 which may be utilized to expand the input to an input gate having up to ten inputs. An assertion output terminal 405 and a negation output terminal 406 are provided to provide either a binary one or a binaryzero during a delay period. A number of capacitors 407-410 are provided in the circuit and connected to a set of terminals 411-414. Pulse widths are controlled by connecting one or more of these capacitors by use of their respective terminals to adelay node terminal 415. Two or more of these capacitors may be connected simultaneously and the resulting pulse will have a width equal to the sum of those associated with the individual node capacitors. A delay terminal 416 is provided for purpose ofconnecting external capacitors in the circuit which will give delay periods which cannot be provided by combinations of capacitors 407-410. These external capacitors are connected between the terminals 416 and 416.
FIG. 14 illustrates the symbol representing FIG. 13. The terminals 411-414 are shown within a rectangle 417 to indicate that internal circuit connections are to be made to these terminals if it is desired to use any one or more of them. Terminals 415 and 416 are located outside the rectangle 417 to indicate that they may be connected to external circuitry which, of course, will be in the form of external capacitors. Terminals 403 is connected to a semicircle to indicate that it is inthe form of an AND gate input and terminal 404 is connected to the edge of a semicircle symbol 418 to indicate that it is a node connection to the input AND gate. A condenser symbol 419 is connected to the AND gate symbol 418 to illustrate that theoutput of the AND gate is AC coupled to a base of one of the transistors forming the one-shot multivibrator.
AC BISTABLE MULTIVIBRATOR
FIG. 15 illustrates a bistable multivibrator whose input may be wired to perform any logical function required of a bistable multivibrator often referred to as a "FLIP-FLOP" such as counting, shifting, accumulating, etc. The circuit is providedwith a pair of AC coupled set input terminals 420 and 421, and an AC coupled reset input terminal 422. The circuit is also provided with a set level control terminal 423 and a reset level control terminal 424 to allow gating of set and resetinformation. The output terminals consist of a set output terminal 425 and a reset output terminal 426. A DC reset input terminal 427 is also provided.
The symbol representing the bistable multivibrator shown in FIG. 15 is illustrated in FIG. 16. The AC set and reset inputs are illustrated by key symbols 420 and 421, and 422 in semicircular gate symbols 431, 432, and 433, respectively, toindicate that they are AC inputs. Those with multiple inputs 431, 433 may be gated with level control signals. A logical one or open circuit on a level set or level control input inhibits the associated set or reset input. A logical zero or a groundedlevel set input enables the associated set or reset input to be effective.
SIMPLE BISTABLE MULTIVIBRATOR
A simple bistable multivibrator is shown in FIG. 17 which is similar to the bistable multivibrator shown in FIGS. 9 and 11 with the exception that it does not contain complement input circuitry to a pair of transistors 450 and 451. It is,however, provided with a DC input set terminal 452, a DC input set node terminal 453 for the purpose of expanding the number of DC set inputs by use of a circuit such as shown in FIG. 7, a pair of DC reset input terminals 454 and 455, a DC reset nodeterminal 456 to expand the number of DC reset input terminals when it is connected to an AND gate or diode cluster as shown in FIG. 7, a reset output terminal 457, and a set output terminal 458.
The symbol representing the simple bistable multivibrator shown in FIG. 17 is illustrated in FIG. 18 with the DC input terminals and their respective node terminals shown in the previously described manner of having a rectifier symbol connectedto each of the input terminals and no rectifier symbol connected to the node terminals.
POWER AMPLIFIER
The power amplifier schematically shown in FIG. 19 is of conventional transistor design having a DC input terminal 500, a DC input node terminal 501 capable of expanding the inputs to ten, and a pair of dual output terminals 502 and 503. Thus,the power amplfier is logically equivalent to the NAND gate illustrated in FIG. 5, but is capable of driving a larger load than the NAND gate shown in FIG. 5.
The symbol for the power amplifier illustrated in FIG. 19 is shown in FIG. 20. It consists of a triangle 505.
UNIVERSAL BISTABLE MULTIVIBRATOR
A schematic drawing of a universal bistable multivibrator is shown in FIG. 21. The universal multivibrator contains two transistors 510 and 511 wired into a conventional bistable multivibrator circuit similar to the bistable multivibratorsillustrated in FIGS. 9 and 15 which in addition to the basic bistable multivibrator construction, have circuitry to provide a series of level controls and AC set and reset controls. In a manner similar to the aforementioned bistable multivibrator logiccircuits, a pair of DC set input terminals 512 and 513, a DC set node input terminals 514, a pair of DC reset input terminals 515 and 516, a DC reset node input terminal 517, a set output terminal 518 and reset output terminal 519 are provided. An ACset input terminal 520 has gated with it a level control input terminal 521. An AC reset input terminal 523 is gated with a level control input terminal 524. A common AC input terminal 526 has associated with it two level controls 522 and 525essentially similar in function to those associated with the AC set and reset input terminals. These serve to steer signals applied to the common AC input terminal 526 to either the set or reset side of the bistable multivibrator. Thus, when theassociated level control inputs are connected to another bistable multibrator to form a shift register, the common AC input terminals 526 serves as a shift input. When the level control inputs are tied back to their own outputs, the circuit functions asa binary counter for pulses applied at its AC input. If the AC set and AC reset input terminals 520 and 523 are connected together, their function becomes identical to that of common AC input terminal 526 except that AC loading is doubled.
The symbol representing the universal bistable multivibrator illustrated in FIG. 21 is shown in FIG. 22. The terminals 522 and 525, respectively, are shown connected to input gates which are in turn connected in parallel with AND gates 530 and531, respectively. These inputs are also shown connected in parallel with the DC inputs 512, 513, 514, and 515, 516, and 517, respectively.
SHIFT REGISTER
The shift register circuit shown in FIG. 23 is a bistable multivibrator circuit similar to those shown in FIG. 11 and FIG. 17. It has the same number and type of DC input and output terminals as the bistable multivibrator illustrated in FIG. 17. It has a DC set input terminal 551, a DC set input node 552, a pair of DC reset input terminals 553 and 554, a reset node terminal 555, a reset output terminal 556, and a set output terminal 557. A shift line terminal 558 is provided to cause shiftingof information from one bistable multivibrator to a subsequent bistable multivibrator. This bistable multivibrator is used only in groups of four to form four-bit shift registers. A set level control terminal 550 and a reset level control terminal 549are provided to connect to the respective output terminals of a previous multivibrator in the shift registers. These terminals on the first multivibrator in the shift registers are connected to a source of binary bit information.
The symbol representing the shift register bistable multivibrator illustrated in FIG. 23 is shown in FIG. 24.
MULTIVIBRATOR CLOCK
The multivibrator clock shown functionally in FIG. 25 is utilized as a clock source of conventional design. A free running multivibrator 600 is an astable circuit. Its operational frequency range is dependent upon the parallel capacitancecombination selected by interconnecting specific timing terminals. The basic frequency of the multivibrator is one megacycle adjustable to 150 kilocycles without making any jumper connections. This frequency may be progressively reduced by making theconnections to a terminal 606 and a terminal 605. A potentiometer (not shown) allows variation of the frequency within the selected range.
A start control input terminal 601 controls operation of the free running multivibrator 600. Logic zero (zero volt) applied to terminal 601 stops oscillation of the circuit. No connection to terminal 601 is equivalent to the application of alogical one and oscillation results.
A gate control input terminal 604 in coincidence with the output from astable multivibrator terminal 603 gates a pulse shaper 609, which is in the form of a delay multivibrator, forming an AND gate for negative logic. A logical zero input to thegate control terminal inhibits the pulse shaper; a logical one or no connection to pin 604 permits the pulse shaper to function. If the pulse shaper is inhibited to the gate control input terminal 604, the astable multivibrator 600 continues to runfree. The multivibrator has a width node terminal 605, an external width node terminal 606, an assertion terminal 607, and a negation terminal 608.
FIG. 26 shows the symbol representing the multivibrator clock circuit illustrated in FIG. 25.
SOLENOID DRIVER
A solenoid driver circuit is illustrated in FIG. 27. It consists of a two-input gate followed by a two-stage non-inverting transistor of conventional design generally indicated at 650. The two-input gate consists of commonly connected DC inputterminal 651 through a rectifier 652, a DC input terminal 653 connected through a rectifier 654, and a DC node terminal 655. The two-stage noninverting transistor amplifier includes a pair of transistors 656 and 657. When all terminals 651, 653, andany additional terminals created by connecting a diode cluster to node 655 are at logical one (minus six volts), the gate turns "ON," the first transistor 656 and the output transistor 657 turns "OFF," and a solenoid 658 connected across output terminals659 and 660 is not energized. When any of the inputs to the terminals 651, 653, and any additional terminals connected through a diode cluster to terminal 655 goes to logical zero (zero volt), transistor 656 is turned "OFF," the output transistor 557 isturned "ON," and a circuit path is provided through the solenoid to an external power supply 661 connected between terminal 659 and a circuit ground terminal 662. The solenoid and its external power supply are not a portion of the solenoid driver itselfand, therefore, must be provided in addition to the driver circuit.
FIG. 28 shows the symbol representing the solenoid driver illustrated in FIG. 27.
Player sequencer unit
The player sequencer serves as a selector to indicate the proper player to be credited with pinfall. FIG. 29 is a schematic drawing of the player sequencer unit.
For the purpose of simplicity, the embodiment of the invention illustrated in the drawings is an embodiment designed to compute scores for only two bowling lanes which is the number normally used in league competition play with two teamscompeting against each other and alternating lanes for each frame of a bowling game. It will be understood by those skilled in the art that the principles illustrated by this embodiment can be applied to a large plurality of bowling lanes.
The player sequencer unit 11 shown in FIG. 29 produces outputs to the comparator 13 which designates the player to whom pinfall is to be credited at any particular time during a bowling game. Normally, this would be the player who is bowling inhis proper turn and has just rolled a ball. However, there are three other sources of player identification which the player sequencer unit 11 may indicate to the comparator 13. They are a designation of an out-of-turn bowler, the identification of aplayer whose score is to be corrected, and the identification of each player from the memory reset unit in order to reset the code words for a new game. Besides the identification of the players, the player sequencer also designates to the comparatorthe identification of two mark and team total code words which are carried in the memory 15 and circulated to the operating register SR in the same manner that the words for the individual players are transported between the memory and the operatingregister. Thus, the player sequencer unit will indicate a player's identification from one of four possible sources or the identification of one of the two mark and team total words to the comparator so that the comparator will initiate action to havethe code words sequentially pass through the operating register until the word commanded by the player sequencer arrives in the operating register. The player sequencer section has two electronic registers 1110 and 1111. These registers calculate theproper player of each team who should be bowling on each lane if the players are bowling in their proper sequence. Thus, when pinfall arrives in the pinfall sequencer unit 12 from one lane or the other, the pinfall sequencer 12 indicates that theidentification of the bowler on that lane is to be sent by the player sequencer unit 11 to the comparator 13. As will be presently described, the player sequencer unit 11 will also send the player's identification to the comparator if an out-of-turnbowler is bowling, if a player's score is being corrected, or if the memory 15 is being sequenced for resetting prior to the start of a new game. A player's identification switch 1112 stores the identification of a player who is bowling out-of-turn orwhose score is being corrected so that it is available for transmitting to the comparator.
Each register is composed of four bistable multivibrators 1114-1117 and 1118-1121, respectively. Three of the bistable multivibrators in each register 1114-1116 and 1118-1120, respectively, are connected to form a binary counter containing threebits and counting up from zero to decimal seven. The outputs of the two registers are connected to two series of NAND circuits. The first series of circuits consists of two switching devices 1122 and 1123 to activate the transfer of identificationinformation from register 1110 to the aforementioned second series of NAND circuits and to activate the transfer of identification information in register 1111 to the aforementioned second series of NAND circuits. The second series of NAND circuits isan output device 1124 which places identification information received from either one of the register through the switching devices 1122 or 1123, the player identification switch 1112 from the memory reset unit or from a "Team and Mark Total" signal. As will be described at the proper time, the identification of a player is released from one of these sources to the output circuit 1124 for transmission to the comparator. The circuits which provide the identification of the player who is bowling onone lane or the other in his proper sequence will be described first. The provision of this information is one of the principal functions of the player sequencer 11.
NAND gates are used extensively throughout the illustrated embodiment of the invention. The NAND circuits shown in the drawings have only two normal input terminals and an input node for the connection of additional diode cluster which canextend the number of inputs to the NAND circuits to any number desired less than eleven. Therefore, throughout the description of the various circuits, the drawings will show an input entering a NAND gate through a diode cluster connected to the nodeterminal of the NAND gate. Therefore, in describing the various circuits, a NAND gate will be referred to without specifically mentioning a diode cluster which extends the number of input terminals to that NAND gate.
Bistable multivibrators 1114, 1115, and 1116 are connected as an additive counter capable of storing player identification from zero to decimal seven. Binary multivibrator 1117 serves to indicate which team is on lane 1. In like manner, theregister 1111 has for the purpose of indicating the player and team bowling on lane 2, the three binary counters 1118, 1119, and 1120 connected as an additive counter capable of storing player identification of zero to decimal seven and multivibrator1121 connected to indicate the team. Two sections of each binary counter 1115, 1116, 1119, and 1120, respectively, are connected in inverse fashion so that a binary one on the upper output terminal signifies a reset of the unit rather than a setcondition. The vertical line running down through the schematic designation for all such unit signifies this condition. This is normally done in order to achieve a proper resetting action on certain subunits.
The binary codes used to identify each player are shown in Table I.
TABLE I ______________________________________ PLAYER IDENTIFICATION Weighted value: Use ______________________________________ 8421 0000 Unused. 0001 Player 1, Team A. 0010 Player 2, Team A. 0011 Player 3, Team A. 0100 Player 4, Team A. 0101 Player 5, Team A. 0110 Player 6, Team A. 0111 Team A mark and team total register. 1000 Memory resetting code word. 1001 Player 1, Team B. 1010 Player 2, Team B. 1011 Player 3, Team B. 1100 Player 4, Team B. 1101 Player 5, Team B. 1110Player 6, Team B. 1111 Team B mark and team total register. ______________________________________
It will be noted from the table that when the term "Player Identification" is used, it also includes the identification of the words which are utilized to store and compute the team marks and team totals and the identification of the memoryresetting code word. Table I also shows that the code 0000 is unused. During denergization of a computer (whether intentional or through a power failure) transients occur which could jeopardize the contents of the operating register. By having oneunused word, with identification 0000, and insuring that this word is in the operating register whenever shutdown occurs, it is impossible to harm any needed information. Thus, the unused location does assume some importance. When the initial resetsignal is activated (either by operation of the panel switch 45 or the test panel switch 230), a terminal 1101 is grounded, causing grounding of an input terminal of an AND gate 1126 causing the grounding of DC set terminals of bistable multivibrators1114, 1115, and 1116, respectively. In like manner, an AND gate 1130 brings about the grounding of DC set terminals of mulvitibrators 1118, 1119, and 1120, respectively. This action resets multivibrators 1115, 1116, 1119, and 1120 and setsmultivibrators 1114 and 1118, thus aligning each register for player 1 on each respective team. The weighted value "8421" indicated in Table I will be found in bistable multivibrators 1117, 1116, 1115, and 1114, respectively, and in bistablemultivibrators 1121, 1120, 1119, and 1118, respectively. Since it may be seen that the circuitry assciated with lane 1 and that associted with lane 2 are identical in operation, only the circuitry for lane 1 will be described in complete detail. Theaction of grounding terminal 1101 places a binary one in multivibrator 1114 and zeros in multivibrators 1115 and 1116, respectively. Thus the binary counter contains the identification code of 0001 or player 1. Grounding terminal 1101 also ground theDC set terminal of bistable multivibrator 1117, thus placing a binary zero in that multivibrator. A binary zero, as may be seen from Table I, indicates Team A. Grounding of the terminal 1101 places a binary zero on the set input terminal ofmultivibrator 1121 to place a binary one in that multivibrator which indicates Team B is bowling on lane 2. In the described manner, energizing the computer by use of switch 45 places the first player of Team A on lane 1 and the first player of Team Bon lane 2. After each player bowls on lane 1 and the computer has finished with its scoring sequence for the bowler, an increment sequencer pulse is applied to terminal 1102 to produce a pulse at an input terminal of a NAND gate 1138. If bowling isbeing scored for lane 1 and no out-of-turn situation exists, a binary one will appear at another terminal of gate 1138 causing a pulse to be applied to a complement input terminal of bistable multivibrator 1114, causing the counter to count by one andthus designate the next player to bowl on that lane. Gate 1138 produces a binary zero to cause such upcounting by receiving a binary one on its input terminal which is produced by a binary one appearing on an input terminal 1259 to NAND gate 1139 toindicate that lane 1 is being scored and a binary one appearing on terminal 1667 to NAND gate 1139 to indicate that there is no out-of-turn bowling situation present. A binary zero appears on an output terminal of NAND gate 1139 which is inverted toprouce a binary one at an output terminal of a NAND gate 1140. Thus, as each player completes a frame, the counter will count up one to indicate the code designation for the subsequent player.
Another complement input terminal of multivibrator 1114 is connected to electrical ground through the normally open skip switch 57, mounted in the panel portion 56, FIG. 2, and A NAND gate 1149. Thus, closure of switch 57 puts a "Skip" signal onthe complement input terminal to cause the binary counter to count upward once for each press of the switch. Thus, through operation of the counter to count up one for each completion of a frame by a bowler or a manually initiated "Skip" signal, thecounter will faithfully store the identity of the player bowling on lane 1.
The above-described functions will continue until all players on a team have completed a frame. The number of players bowling on a team may be varied from one to six, and therefore, some means must be provided for indicating to the register 1110that the last player of a team has bowled so that it can be reset for the first player of Team B. This function is performed by a team size circuit 1150 which contains two ganged rotary switches 52 and 55 having six switching sectors each 1151-1156 forlane A and 1157-1162 for lane B, NAND gates 1163-1166 and a pair of delay multivibrators 1167 and 1168 hvaing a set input terminal connected to AND gates 1169 and 1170. Before the start of the game, the two ganged switches have been set for the teamsize of Team A and Team B, respectively. Switching sectors 1151-1153 are connected to the multivibrators 1114-1116 of the counter of register 1110 to receive information on each digit of player identification or its complement so that a binary one willbe placed on three input terminals of NAND gate 1163. Terminal 1102 is connected to a fourth terminal of NAND gate 1163 in order that a binary one will appear on the input terminal each time an increment sequencer pulse is applied to terminal 1102. Thus, the output terminal of NAND gate 1163 will have a binary zero appearing thereon only when an increment sequencer pulse is being received, indicating that the scoring of a frame has been completed for a player and that a sequencer pulse has beenreceived by the binary counter to cause it to count up to a player identification one greater than the team size. The team size determination is made by the appearance of binary one on the three aforementioned terminals through closed circuits of switchsectors 1151, 1152, and 1153. These three switch sectors are all closed with portions of the multivibrators of the counter only when the particular combinations of a player's identification code on his team appears in the counter. A tracing of each oneof the circuits from the counter through the sector switches will confirm that three binary ones can appear only when a player's identification appears that is one greater than that which is set on the ganged switch 52. In order for a binary zero toappear on the output terminal of NAND gate 1163 to indicate the completion of all the players of Team A on lane 1, a binary one must also appear on a fifth input terminal of NAND gate 1163. Since this terminal is connected to a set output terminal ofthe team indicating multivibrator 1117, a binary one indicating Team A is provided to terminal 303 of NAND gate 1163. Switch sectors 1157, 1158, and 1159 and NAND gate 1154 perform a similar function for Team B when it is bowling on lane 1 and when anincrement sequencer pulse is being applied to register 1110, causing it to count to a player's number one higher than that selected on switch sectors 1157-1159. A binary one then appears on an output terminal of NAND gate 1164. Since AND gate 1169 willplace a binary one on an input trigger terminal of the delay multivibrator 1167, a binary zero will not appear on this terminal until the team using lane 1 (either Team A or Team B) has completed bowling in any frame. Multivibrator 1167 has a fivemicrosecond delay from the time it is triggered by a binary zero appearing at its input trigger terminal. During this period of time, a negation output terminal which is normally a binary one becomes a binary zero. The negation output terminal isconnected to an input terminal of AND gate 1126 to cause AND gate 1126 to produce a binary zero at its output terminal since its other input terminal is binary one except when terminal 1101 is grounded by an initial reset circuit. The output terminal ofAND gate 1126 is connected to the set input terminals of binary counters 1114, 1115, and 1116 so that the identification code of 001 is reset in the counter register again.
The delay multivibrator 1167 is connected to set in motion a number of operations which result in the bistable multivibrator 1117 being reset to indicate that Team B will bowl next on lane 1, and in like manner, the lane multivibrator 1168 setsin motion a series of operations which indicate that Team A will bowl next on lane 2. During the five microsecond delay of delay multivibrator 1167, an assertion output terminal of delay multivibrator 1167 goes to a binary one, and if league play hasbeen indicated on the control panel, a binary zero appears at the output terminal of a NAND gate 1184. This action causes a binary one to appear at an AC set input terminal of a bistable multivibrator 1186 which is connected to the NAND gate 1184through a second NAND gate 1187. At the end of the five microsecond period, a set output terminal of multivibrator 1186 returns to binary zero setting the binary counter multivibrator 1117. Thus, at the end of a frame in league play, a "Print MarkTotal" (PMT) signal is issued to a terminal 3016. When printing (or other display) is accomplished, a "Score Print Complete" signal is received on a terminal 1103 which turns off the "Print Mark Total" signal. The use of the term "print" .sbsp.utilizedthroughout the scorer to indicate the functioning of the scorer for operating a printer. The term "print" is synonymous with the term "display" when any other display system is connected to the scorer. The set output terminal of multivibrator 1186 isconnected to a complement input terminal of the bistable multivibrator 1117 through an AND gate 1190. Multivibrator 1117 stores information pertaining to the team bowling on lane 1 so that when the set output terminal of multivibrator 1186 returns to abinary zero, multivibrator 1117 is complemented, changing to its reset condition, thus indicating that Team B is now bowling on lane 1. In like manner, the multivibrator 1121 is reset to Team A through the action initiated by the delay multivibrator1186 and similar circuitry to that just des | | | |
