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D653634 Semiconductor
Patent Drawings:Drawing: D653634-2    Drawing: D653634-3    Drawing: D653634-4    Drawing: D653634-5    Drawing: D653634-6    Drawing: D653634-7    
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(6 images)

Inventor: Soyano
Date Issued: February 7, 2012
Application: D/390,541
Filed: April 26, 2011
Inventors: Soyano; Shin (Kanagawa, JP)
Assignee: Fuji Electric Co., Ltd. (Kanagawa, JP)
Primary Examiner: Sikder; Selina
Assistant Examiner:
Attorney Or Agent: Young & Thompson
U.S. Class: D13/182
Field Of Search: D13/110; D13/182; 257/690; 361/713; 361/728; 361/736; 361/775
International Class: 1303
U.S Patent Documents:
Foreign Patent Documents:
Other References:

Claim: CLAIM The ornamental design for a semiconductor, as shown and described.
Description: FIG. 1 is a perspective view of front, top plan and right side of a semiconductor showing our new design;

FIG. 2 is a front view thereof;

FIG. 3 is a rear view thereof;

FIG. 4 is a top plan view thereof;

FIG. 5 is a bottom view thereof;

FIG. 6 is a left side view thereof;

FIG. 7 is a right side view thereof; and,

FIG. 8 is a partial enlarged view at A-A', B-B' thereof.

The portions of the article in broken lines are shown for illustrative purposes only and form no part of the claimed design.

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