Resources Contact Us Home Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE     Gemstone arrangement D557628 Gemstone arrangement Patent Drawings: Inventor: Shah Date Issued: December 18, 2007 Application: D/254,863 Filed: March 1, 2006 Inventors: Shah; Sanjay S. (Mumbai, IN) Assignee: Primary Examiner: Simmons; Ian Assistant Examiner: Muller; David G. Attorney Or Agent: Rader, Fishman & Grauer, PLLC U.S. Class: D11/91 Field Of Search: D11/89; D11/90; D11/91; D11/92; D11/93; D11/1; D11/2; D11/6; D11/7; D11/8; D11/9; D11/10; D11/11; D11/12; D11/16; D11/24; D11/25; D11/26; D11/27; D11/28; D11/34; D11/35; D11/36; D11/37; D11/38; D11/39; D11/40; D11/41; D11/42; D11/43; D11/70; D11/79; D11/30; D11/222; D11/47; D11/75; D11/81; D11/56; 63/1.11; 63/2.11; 63/3.11; 63/4.11; 63/5.11; 63/6.11; 63/7.11; 63/8.11; 63/9.11; 63/10.11; 63/11.11; 63/12.11; 63/13.11; 63/15; 63/20; 63/22; 63/23; 63/26; 63/27; 63/28; 63/29; 63/30; 63/31; 63/32; 63/33 International Class: 1101 U.S Patent Documents: Foreign Patent Documents: Other References: Abstract: Claim: CLAIM The ornamental design for a gemstone arrangement, as shown and described. Description: FIG. 1 is a top perspective view of a gemstone arrangement design. FIG. 2 is a bottom perspective view of an embodiment of the gemstone arrangement design of FIG. 1. FIG. 3 is a top plan view of the gemstone arrangement design of FIG. 1. FIG. 4 is a bottom plan view of the gemstone arrangement design of FIG. 3. FIG. 5 is a top plan view of a second embodiment of the gemstone arrangement design of FIG. 1; and, FIG. 6 is a bottom plan view of the gemstone arrangement design of FIG. 5. * * * * *       Recently Added Patents Method, apparatus, and system for synchronously resetting logic circuits Multiple node applications cooperatively managing a plurality of packet switched network pathways Alcohol-tolerant malolactic strains for the maturation of wines with average or high pH Circuit for correcting sensor temperature characteristics Modular heater systems Methods and apparatus for cost minimization of multi-tiered infrastructure with end-to-end delay guarantees Apparatus for data recovery in a synchronous chip-to-chip system   Randomly Featured Patents Heat and radio frequency-curable two-pack soy protein-based polyurethane adhesive compositions Systems for comprehensive erase verification in non-volatile memory Apparatus and method for synchronously providing a fullness indication of a dual ported buffer situated between two asynchronous buses Elevation sight mount for a piece of artillery Optical device free from stress due to difference in thermal expansion coefficient between parts and process for fabrication thereof Food container Artificial larynx Semi-automated desk checking system and method Tread portion of an automobile tire Method and structure for a self-aligned silicided word line and polysilicon plug during the formation of a semiconductor device © 2006. PatentGenius. All Rights Reserved.