Resources Contact Us Home Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE     Earring D541694 Earring Patent Drawings: Inventor: Ping Date Issued: May 1, 2007 Application: D/208,641 Filed: July 2, 2004 Inventors: Ping; Chow Kin (Hunghom, Kowloon, HK) Assignee: Primary Examiner: Clark; Doris Assistant Examiner: Pratt; Michael Attorney Or Agent: U.S. Class: D11/40 Field Of Search: D11/7; D11/8; D11/16; D11/17; D11/34; D11/35; D11/36; D11/37; D11/40; D11/41; D11/42; D11/43; D11/44; D11/45; D11/79; D11/87; D11/88; D11/89; D11/90; D11/91; D11/92; D11/93; D11/94; 63/12; 63/13; 63/14.1; 63/26; 63/27; 63/29.1; 63/29.2; 63/30; 63/31; 63/32 International Class: 1101 U.S Patent Documents: 2878660; 5074128; D373742; 6047563 Foreign Patent Documents: Other References: Abstract: Claim: CLAIM The ornamental design for an earring, as shown. Description: The FIGURE is a front elevation view of the earring showing my new design. * * * * *       Recently Added Patents Methods and apparatuses for improved stabilization in a probing system Baffle assembly module for vertical staged polymerization reactors Compositions and methods for altering tocotrienol content Power array system and method Signaling method in an OFDM multiple access system Hardware bolt Component mounting apparatus with pivotable transfer mechanism   Randomly Featured Patents Fiber optic micro-doppler ladar system and operating method therefor Lamp Signal processing providing lower downsampling losses Storage container Method and apparatus for processing a sound signal Apparatus and method for connecting casing to lateral casing using thermoset plastic molding Ethyleneimine inactivated organisms Natural throttling of data transfer across asynchronous boundaries Wide adder with critical path of three gates Interconnection structure used in a pad region of a semiconductor substrate © 2006. PatentGenius. All Rights Reserved.