Resources Contact Us Home
D420272 Pull
Patent Drawings:Drawing: D420272-2    
« 1 »

(1 images)

Inventor: Caugh, et al.
Date Issued: February 8, 2000
Application: D/082,802
Filed: January 7, 1998
Inventors: Caugh; Gerald (Rockford, MI)
DeWald; Kevin (Spring Lake, MI)
Mattson; Deborah (Plainwell, MI)
Assignee: Belwith International (Grandville, MI)
Primary Examiner: Bullock; B. J.
Assistant Examiner:
Attorney Or Agent: Rader, Fishman & Grauer
U.S. Class: D8/305; D8/310
Field Of Search: D8/300; D8/305; D8/307; D8/310; 16/11R; 16/121
International Class:
U.S Patent Documents: D199117; D199666; D200097
Foreign Patent Documents:
Other References: Sunland Imports Website--http://www.sunland imports. Com/minirug.htm; Zapotec rug, Apr. 16, 1998..
Sunland Imports Website--http://www.sunland imports. Com/navajo2.htm; Navojo Rug, Apr. 16, 1998..

Claim: We claim, the ornamental for a pull, as shown and described.
Description: FIG. 1 is a front elevational view of the pull of the present invention; and,

FIG. 2 is a cross sectional view taken substantially through lines 2--2 of FIG. 1.

* * * * *
  Recently Added Patents
Intralevel conductive light shield
Base station synchronization for a single frequency network
Malicious attack detection and analysis
Soliciting first party in communication session to maintain call when degradation of connection to second party is anticipated
Use of emerging non-volatile memory elements with flash memory
Playback device for stereoscopic viewing, integrated circuit, and program
Vehicle window opening and closing control device
  Randomly Featured Patents
Display unit and its driving method
Co-tolerant fuel cell electrode
Process and apparatus for treating bulk commodities
Motor control system
Hot-water supply system with heat pump cycle
Manicure kit
Enhanced mobility CMOS transistors with a V-shaped channel with self-alignment to shallow trench isolation
Supplying hysteresis effect mitigated clock signals based on silicon-test characterized parameter
Tristate output buffer with high-impedance state responsive to increase in power supply voltage