| D416331 |
Column surround simulating a stack of gaming chips
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| Patent Drawings: | |
| Inventor: |
Rom |
| Date Issued: |
November 9, 1999 |
| Application: |
D/078,345 |
| Filed: |
October 22, 1997 |
| Inventors: |
Rom; Jeffery A. (Henderson, NV)
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| Assignee: |
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| Primary Examiner: |
Clark; Doris |
| Assistant Examiner: |
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| Attorney Or Agent: |
Quirk & Tratos |
| U.S. Class: |
D20/41; D25/130; D25/38 |
| Field Of Search: |
D20/10; D20/19; D20/41; D25/126; D25/130; D25/38; 40/584; 40/606; 40/607; 40/608; 256/1; 256/19; 256/21; 256/22; 256/34; 256/59; 256/65; 256/66 |
| International Class: |
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| U.S Patent Documents: |
D90909; D334215; D349164; 4209928; 4516756 |
| Foreign Patent Documents: |
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| Other References: |
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| Abstract: |
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| Claim: |
The ornamental design for a column surround simulating a stack of gaming chips, as shown and described. |
| Description: |
FIG. 1 is a top perspective view of the column surround simulating a stack of gaming chips of the present invention adapted to be disposed about a column such as a concrete building column;
FIG. 2 is a front view of one embodiment of the column surround simulating a stack of gaming chips;
FIG. 3 is a right side view of the column surround simulating a stack of gaming chips of FIG. 1;
FIG. 4 is a rear view of the column surround simulating a stack of gaming chips of FIG. 1;
FIG. 5 is a left side view of the column surround simulating a stack of gaming chips of FIG. 1;
FIG. 6 is a top view of the column surround simulating a stack of gaming chips of FIG. 1;
FIG. 7 is a bottom view of the column surround simulating a stack of gaming chips of FIG. 1;
FIG. 8 is a top perspective view of the surround of another embodiment of the present invention adapted to be disposed about a column such as a concrete building column;
FIG. 9 is a front view of the column surround simulating a stack of gaming chips of FIG. 8;
FIG. 10 is a right side view of the column surround simulating a stack of gaming chips of FIG. 8;
FIG. 11 is a rear view of the column surround simulating a stack of gaming chips of FIG. 8;
FIG. 12 is a left side view of the column surround simulating a stack of gaming chips of FIG. 8;
FIG. 13 is a top view of the column surround simulating a stack of gaming chips of FIG. 8; and,
FIG. 14 is a bottom view of the column surround simulating a stack of gaming chips of FIG. 8.
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