

Predistortion architecture for compensating nonlinear effects 
8711976 
Predistortion architecture for compensating nonlinear effects


Patent Drawings:  

Inventor: 
Chandrasekaran 
Date Issued: 
April 29, 2014 
Application: 

Filed: 

Inventors: 

Assignee: 

Primary Examiner: 
Fan; Chieh M 
Assistant Examiner: 
Shah; Tanmay 
Attorney Or Agent: 
Mendelsohn, Drucker & Dunleavy, P.C.Mendelsohn; Steve 
U.S. Class: 
375/297 
Field Of Search: 
;375/297 
International Class: 
H04K 1/02; H04L 25/03; H04L 25/49 
U.S Patent Documents: 

Foreign Patent Documents: 
0 416 622; 1 085 668; 1 199 797; 1 280 273; 1 463 198; 2 348 755; 2 384 377; WO 03/085822 
Other References: 
"An Efficient Adaptive Predistorter for Nonlinear High Power Amplifier in Satellite Communication", by Kang H.W. et al., 1997 IEEEInternational Symposium on Circuits and Systems, Jun. 912, 1997, pp. 2282291, XP0000804798, New York. cited by applicant. "A simplex method for function minimization", by J.A. Nelder and R. Mead, Computer Journal, vol. 7 (1965), pp. 308313. cited by applicant. International Search Report; Mailed: Aug. 1, 2012 for corresponding PCT Application No. PCT/US2012/035742. cited by applicant. 

Abstract: 
An input signal is predistorted to reduce distortion resulting from subsequent signal amplification. Frequencydependent predistortion is preferably implemented in combination with frequencyindependent predistortion, where the frequencydependent predistortion is generated by expanding the derivative of a product of a predistortion function and the input signal and then relaxing constraints on the predistortion function and/or on frequencydependent filtering associated with the frequencydependent predistortion. In one implementation, four different frequencydependent predistortion signals are generated for the expansion using up to four different predistortion functions and up to four different frequencydependent filters. 
Claim: 
What is claimed is:
1. A method for reducing distortion in an output signal by applying predistortion to an input signal to generate a predistorted signal, such that, when the predistortedsignal is applied to a nonlinear system to generate the output signal, the predistortion reduces the distortion in the output signal, wherein the predistorted signal is generated by: (a) generating a first frequencydependent predistortion signalcorresponding to a product of (i) a derivative of a first predistortion function and (ii) the input signal; (b) generating a second frequencydependent predistortion signal corresponding to a product of (i) a derivative of a second predistortionfunction and (ii) the input signal; (c) generating a third frequencydependent predistortion signal corresponding to a product of (i) a third predistortion function and (ii) a derivative of the input signal; (d) generating a fourthfrequencydependent predistortion signal corresponding to a product of (i) a fourth predistortion function and (ii) the derivative of the input signal; and (e) generating the predistorted signal based on a combination of the first, second, third, andfourth frequencydependent predistortion signals.
2. The invention of claim 1, further comprising: (f) applying the predistorted signal to the nonlinear system to generate the output signal.
3. The invention of claim 2, wherein the nonlinear system comprises an amplifier that generates the output signal.
4. The invention of claim 1, wherein at least one of the first and second predistortion functions is different from both of the third and fourth predistortion functions.
5. The invention of claim 4, wherein each of the first and second predistortion functions is different from both of the third and fourth predistortion functions.
6. The invention of claim 1, wherein: step (a) comprises applying a first filter function to generate the first frequencydependent predistortion signal; step (b) comprises applying a second filter function to generate the secondfrequencydependent predistortion signal; step (c) comprises applying a third filter function to generate the third frequencydependent predistortion signal; and step (d) comprises applying a fourth filter function to generate the fourthfrequencydependent predistortion signal.
7. The invention of claim 6, wherein the first, second, third, and fourth filter functions are frequencydependent functions.
8. The invention of claim 6, wherein at least one of the first and second filter functions is different from both of the third and fourth filter functions.
9. The invention of claim 8, wherein each of the first and second filter functions is different from both of the third and fourth filter functions.
10. The invention of claim 1, further comprising: (f) generating a frequencyindependent predistortion signal corresponding to a product of (i) a fifth predistortion function and (ii) the input signal, wherein step (e) comprises generatingthe predistorted signal based on the first, second, third, and fourth frequencydependent predistortion signals and the frequencyindependent predistortion signal.
11. The invention of claim 1, wherein the predistorted signal is generated according to: .function.'.function..function..function..function..function..function..f unction..times..times..function..function..function..function..function..times..times..function..function..function..function..function..times..time s..function..function..function..function..function..times..times..functio n. ##EQU00003## where: x[n] is the input signal; x.sub.pd[n'] is the predistorted signal; a[n] isthe power of the input signal; d.sub.0 is a synchronization delay; x[nd.sub.0] is a delayed version of the input signal; f.sub.11(), f.sub.12(), f.sub.21(), f.sub.22() are the first, second, third, and fourth predistortion functions; f.sub.0() is afifth predistortion function used to generate a frequencyindependent predistortion signal; h.sub.d[] is a differentiating filter function; h.sub.B1[], h.sub.B2[], h.sub.B3[], h.sub.B4[] are frequencydependent filter functions; "" representscomplex multiplication; and "*" represents convolution.
12. The invention of claim 11, wherein at least one of: f.sub.11 is different from both f.sub.21 and f.sub.22; f.sub.12 is different from both f.sub.21 and f.sub.22; h.sub.B1 is different from both h.sub.B3 and h.sub.B4; and h.sub.B2 isdifferent from both h.sub.B3 and h.sub.B4.
13. The invention of claim 11, wherein: f.sub.11is different from both f.sub.21 and f.sub.22; f.sub.12 is different from both f.sub.21 and f.sub.22; h.sub.B1 is different from both h.sub.B3 and h.sub.B4; and h.sub.B2 is different from bothh.sub.B3 and h.sub.B4.
14. Apparatus for reducing distortion in an output signal by applying predistortion to an input signal to generate a predistorted signal, such that, when the predistorted signal is applied to a nonlinear system to generate the outputsignal, the predistortion reduces the distortion in the output signal, wherein apparatus comprises: a first signal path configured to generate a first frequencydependent predistortion signal corresponding to a product of (i) a derivative of a firstpredistortion function and (ii) the input signal; a second signal path configured to generate a second frequencydependent predistortion signal corresponding to a product of (i) a derivative of a second predistortion function and (ii) the inputsignal; a third signal path configured to generate a third frequencydependent predistortion signal corresponding to a product of (i) a third predistortion function and (ii) a derivative of the input signal; a fourth signal path configured togenerate a fourth frequencydependent predistortion signal corresponding to a product of (i) a fourth predistortion function and (ii) the derivative of the input signal; and a summer configured to generate the predistorted signal based on the first,second, third, and fourth frequencydependent predistortion signals.
15. The invention of claim 14, further comprising the nonlinear system.
16. The invention of claim 15, wherein the nonlinear system comprises an amplifier configured to generate the output signal.
17. The invention of claim 14, wherein: the first, second, third, and fourth predistortion functions are implemented using lookup tables; and each derivative is generated by applying a differentiating filter.
18. The invention of claim 14, wherein at least one of the first and second predistortion functions is different from both of the third and fourth predistortion functions.
19. The invention of claim 14, wherein: the first signal path comprises a first filter configured to apply a first filter function to generate the first frequencydependent predistortion signal; the second signal path comprises a secondfilter configured to apply a second filter function to generate the second frequencydependent predistortion signal; the third signal path comprises a third filter configured to apply a third filter function to generate the third frequencydependentpredistortion signal; and the fourth signal path comprises a fourth filter configured to apply a fourth filter function to generate the fourth frequencydependent predistortion signal.
20. The invention of claim 19, wherein the first, second, third, and fourth filter functions are frequencydependent functions.
21. The invention of claim 19, wherein at least one of the first and second filter functions is different from both of the third and fourth filter functions.
22. The invention of claim 14, further comprising: a frequencyindependent signal path configured to generate a frequencyindependent predistortion signal corresponding to a product of (i) a frequencyindependent predistortion function and(ii) the input signal, wherein the summer is configured to generate the predistorted signal based on the first, second, third, and fourth frequencydependent predistortion signals and the frequencyindependent predistortion signal.
23. The invention of claim 14, wherein the predistorted signal is generated according to: .function.'.function..function..function..function..function..function..f unction..times..times..function..function..function..function..function..times..times..function..function..function..function..function..times..time s..function..function..function..function..function..times..times..functio n. ##EQU00004## where: x[n] is the input signal; x.sub.pd[n'] is the predistorted signal; a[n] isthe power of the input signal generated by a power detector; d.sub.0 is a synchronization delay applied by a delay block; x[nd.sub.0] is a delayed version of the input signal; f.sub.11(), f.sub.12(), f.sub.21(), f.sub.22() are the first, second,third, and fourth predistortion functions; f.sub.0() is a fifth predistortion function used in a frequencyindependent signal path to generate a frequencyindependent predistortion signal; h.sub.d[] is a differentiating filter function; h.sub.B1[],h.sub.B2[], h.sub.B3[], h.sub.B4[] are frequencydependent filter functions; "" represents complex multiplication; and "*" represents convolution.
24. The invention of claim 23, wherein at least one of: f.sub.11 is different from both f.sub.21 and f.sub.22; f.sub.12 is different from both f.sub.21 and f.sub.22; h.sub.B1 is different from both h.sub.B3 and h.sub.B4; and h.sub.B2 isdifferent from both h.sub.B3 and h.sub.B4.
25. The invention of claim 14, wherein each derivative corresponds to differentiation with respect to time.
26. The invention of claim 1, wherein each derivative corresponds to differentiation with respect to time. 
Description: 
BACKGROUND
1. Field of the Invention
The present invention relates to signal processing and, more specifically but not exclusively, to linearizing nonlinear systems, such as nonlinear amplifiers, using digital predistortion.
2. Description of the Related Art
Introduction
This section introduces aspects that may help facilitate a better understanding of the invention. Accordingly, the statements of this section are to be read in this light and are not to be understood as admissions about what is prior art orwhat is not prior art.
FIG. 1 shows a schematic block diagram of signalprocessing system 100, which implements a conventional linearization scheme that employs digital predistortion to linearize an analog subsystem 130 having a nonlinear amplifier 134. Signalprocessing system 100 receives a digital input signal x[n] and generates a linearized, amplified, analog output signal y.sub.amp(t).
In particular, the digital (e.g., baseband or IF (intermediate frequency)) input signal x[n] is processed by digital predistortion (DPD) module 114 to yield a predistorted digital signal x.sub.pd[n], which is converted into an analogpredistorted signal x.sub.pd(t) using a digitaltoanalog converter (DAC) 120. The output of the DAC is frequency converted to a desired frequency (e.g., RF (radio frequency)) using upconverter 132 to yield an RF analog predistorted signalx.sub.pd.sub..sub.rf(t)=Re{x.sub.pd(t)e.sup.jw.sup.c.sup.t}. The RF signal x.sub.pd.sub..sub.rf(t) is amplified by nonlinear amplifier 134 to yield the output signal y.sub.amp(t).
Purpose of Digital PreDistortion
The purpose of the digital predistortion in signalprocessing system 100 is to ensure that the output signal y.sub.amp(t) is close to a linear scaled version of the (theoretical) analog version x(t) of the digital input signal x[n]. That is,y.sub.amp(t).apprxeq.Gx(t), where G is a constant. Note that, in the above notation, the digital signal x[n] is a sampled version of the analog signal x(t).
Computation of the Digital PreDistortion Function
In a typical implementation, a small portion of the amplifier output signal y.sub.amp(t) is removed at tap 140 and mixed down to a suitable intermediate frequency (IF) (or, alternatively, to baseband) using a downconverter 150. The resultingdownconverted feedback signal y.sub.fb(t) is digitized using an analogtodigital (ADC) converter 160 to yield digital feedback signal y.sub.fb[n].
The digital predistortion function implemented by module 114 is initially computed and subsequently adaptively updated by comparing the input signal x[n] with the feedback signal y.sub.fb[n] using a controller (not shown in FIG. 1) that may beimplemented as part of or separate from DPD module 114. The computation can be performed in one of (at least) the following two ways:
1) In a nonrealtime implementation, a block of samples of the input signal x[n] and a block of samples of the feedback signal y.sub.fb[n] are captured and processed by the controller offline to estimate the predistortion function. Suchestimation is typically performed in a DSP (digital signal processor) or microcontroller.
2) In a realtime implementation, the predistortion function is updated by the controller on a samplebysample basis using an adaptive nonlinear filter structure.
PreProcessing
In both cases, one or both of the signals x[n] and y.sub.fb[n] are preprocessed before the controller estimates the predistortion function. The preprocessing aligns the delays, gains, and phases of the two signals. Mathematically, this canbe described as follows:
Estimate the delay .tau. and the complex gain .alpha. that minimizes the cost function: E{(x[n.tau.].alpha.y.sub.fb[n]).sup.2}, where E{} denotes the expectation value operator (or average). In the nonrealtime implementation, minimizingthe cost function reduces to estimating values for the delay .tau. and the complex gain .alpha. that minimize the cost function in the leastsquares sense. Note that the delay .tau. and the complex gain .alpha. can be estimated successively and/orjointly. Also, note that the delay .tau. can be a fractional delay. Techniques for leastsquares estimation are wellknown. See, for example, W. H. Press, B. P. Flannery, S. A. Teukolsky, and W. T. Vetterling, Numerical Recipes: The Art of ScientificComputing (New York: Cambridge University Press, 1986), the teachings of which are incorporated herein by reference.
Digital PreDistortion Function
After the preprocessing, the digital predistortion can be described as estimating the arbitrary nonlinear function f.sub.pd() that minimizes the cost function: E{(f.sub.pd(x[n.tau.],x[n.tau.1],x[n.tau.+1], . . .).alpha.y.sub.fb[n]).sup.2}. (1)
Limitations of Prior Art
FIG. 2, which corresponds to FIG. 5 of U.S. Pat. No. 7,251,293, shows a block diagram of a digital predistortion architecture corresponding to the following Equation (2):
.function.'.function..function..function..function..function..function..f unction..function..function..function..function..function..function. ##EQU00001## where:
Complex input signal x[n]=I+jQ;
Complex predistorted signal x.sub.pd[n']=I'+jQ' is the n'th output sample corresponding to nth input sample;
Input signal power a[n]=.parallel.x[n].parallel..sup.2=I.sup.2+Q.sup.2 generated by power detector 502 of FIG. 2,
Delay d.sub.0 is a synchronization delay applied by Delay.sub.0 block 504 of FIG. 2 to compensate for the processing delay of power detector 502;
x[nd.sub.0] is the delayed input signal generated by Delay.sub.0 block 504;
Delay d.sub.1 is a synchronization delay applied by Delay.sub.1 block 510 of FIG. 2 to compensate for the processing delays of filters 518, 520, 526, and 528. Note that the use of sample index n' in the output sample x.sub.pd[n'] representsthe effect of delays d.sub.0 and d.sub.1;
f.sub.0(), f.sub.1(), f.sub.2() are (possibly nonlinear) polynomial functions of the input signal power a[n] and are represented by Lookup Table #0 506, Lookup Table #1 514, and Lookup Table #2 522 of FIG. 2, respectively;
h.sub.d[] is the impulse response of each differentiator filter 518 and 526 of FIG. 2;
h.sub.P[],h.sub.N[] are the impulse responses of positive and negative Hilbert filters 520 and 528 of FIG. 2 for selecting the positive and negative frequencies, respectively;
"" represents the complex multiplication operator of complex multipliers 508, 516, and 524 of FIG. 2;
"*" is the convolution operator, with x[n]*h[n] representing the output of filter h corresponding to the nth input sample x[n]; and
Summation block 512 of FIG. 2 represents the addition operations in Equation (2).
Predistortion architectures such as those shown in FIG. 2 do not provide adequate linearization for certain amplifier designs under some specific signaling conditions. An example is predistortion with extremely wideband signals and Dohertyamplifiers.
SUMMARY
In one embodiment, the present invention is a method for reducing distortion in an output signal by applying predistortion to an input signal to generate a predistorted signal, such that, when the predistorted signal is applied to anonlinear system to generate the output signal, the predistortion reduces the distortion in the output signal. The predistorted signal is generated by (a) generating a first frequencydependent predistortion signal corresponding to a product of (i)a derivative of a first predistortion function and (ii) the input signal; (b) generating a second frequencydependent predistortion signal corresponding to a product of (i) a derivative of a second predistortion function and (ii) the input signal; (c)generating a third frequencydependent predistortion signal corresponding to a product of (i) a third predistortion function and (ii) a derivative of the input signal; (d) generating a fourth frequencydependent predistortion signal corresponding to aproduct of (i) a fourth predistortion function and (ii) a derivative of the input signal; and (e) generating the predistorted signal based on the first, second, third, and fourth frequencydependent predistortion signals.
In another embodiment, the present invention is an apparatus for reducing distortion in an output signal by applying predistortion to an input signal to generate a predistorted signal, such that, when the predistorted signal is applied to anonlinear system to generate the output signal, the predistortion reduces the distortion in the output signal. The apparatus comprises first, second, third, and fourth signal paths and a summer. The first signal path is configured to generate a firstfrequencydependent predistortion signal corresponding to a product of (i) a derivative of a first predistortion function and (ii) the input signal. The second signal path is configured to generate a second frequencydependent predistortion signalcorresponding to a product of (i) a derivative of a second predistortion function and (ii) the input signal. The third signal path is configured to generate a third frequencydependent predistortion signal corresponding to a product of (i) a thirdpredistortion function and (ii) a derivative of the input signal. The fourth signal path is configured to generate a fourth frequencydependent predistortion signal corresponding to a product of (i) a fourth predistortion function and (ii) aderivative of the input signal. The summer is configured to generate the predistorted signal based on the first, second, third, and fourth frequencydependent predistortion signals.
BRIEF DESCRIPTION OF THE DRAWINGS
Other aspects, features, and advantages of the present invention will become more fully apparent from the following detailed description, the appended claims, and the accompanying drawings in which like reference numerals identify similar oridentical elements.
FIG. 1 shows a schematic block diagram of a signalprocessing system that implements a conventional linearization scheme that employs digital predistortion to linearize a nonlinear subsystem having a nonlinear amplifier;
FIG. 2 shows a block diagram of a priorart digital predistortion architecture; and
FIG. 3 shows a block diagram of a digital predistortion architecture according to one embodiment of the present invention.
DETAILED DESCRIPTION
FIG. 3 shows a block diagram of a digital predistortion architecture 300 according to one embodiment of the present invention. As in the digital predistortion architecture of FIG. 2, digital predistortion architecture 300 receives a complexinput signal x[n] represented by inphase (I) and quadraturephase (Q) components and generates a complex predistorted signal x.sub.pd[n'] that can be converted into an analog signal by a DAC analogous to DAC 120 of FIG. 1 for application to anonlinear analog subsystem analogous to subsystem 130 of FIG. 1. Note that, although upconverter 132 of FIG. 1 can contribute to the nonlinearity of subsystem 130, since most of the nonlinearity is generated by amplifier 134, for convenience, therest of this description refers simply to the amplifier, although the teachings technically apply to the entire nonlinear subsystem.
Like the architecture of FIG. 2, the digital predistortion architecture of FIG. 3 represents the inverse of a model of the nonlinear amplifier to which the predistorted signals are subsequently applied. Compared to the architecture of FIG.2, however, the digital predistortion architecture of FIG. 3 is based on a moreaccurate model of that amplifier in order for the predistorter to sufficiently linearize morecomplex amplifiers that exhibit significant nonlinear effects. As such, thearchitecture of FIG. 3 can provide better linearization for certain amplifier designs under some specific signaling conditions, such as Doherty amplifiers with extremely wideband signals (e.g., signals having a bandwidth greater than about 40 MHz).
The digital predistortion architecture of FIG. 3 can be represented mathematically according to Equation (3) as follows:
.function.'.function..function..function..function..function..function..f unction..times..times..function..function..function..function..function..t imes..times..function..function..function..function..function..times..times..function..function..function..function..function..times..times..functio n. ##EQU00002## where:
Complex input signal x[n]=I+jQ;
Complex predistorted signal x.sub.pd[n']=I'+jQ' is the n'th output sample corresponding to the nth input sample;
Input signal power a[n]=.parallel.x[n].parallel..sup.2=I.sup.2+Q.sup.2 generated by power detector 302 of FIG. 3;
Delay d.sub.0 is a synchronization delay applied by Delay 0 block 304 of FIG. 3 to compensate for the processing delay of power detector 302;
x[nd.sub.0] is the delayed input signal generated by Delay 0 block 304;
Delay d.sub.1 is a synchronization delay applied by each of Delay 1 blocks 314, 324, 336, and 346 of FIG. 3 to compensate for the processing delays of blocks 316, 326, 334, and 344;
Delay d.sub.2 is a synchronization delay applied by Delay 2 block 310 of FIG. 3 to compensate for differences between the processing delays of blocks 306 and 308 and the processing delays of blocks 314352. Note that the use of sample index n'in the output sample x.sub.pd[n'] represents the effect of delays d.sub.0, d.sub.1, and d.sub.2;
f.sub.0(), f.sub.11(), f.sub.12(), f.sub.21(), f.sub.22() are (typically, but not necessarily, nonlinear) polynomial predistortion functions of a[n] and are represented by Lookup Table f.sub.0 306, Lookup Table f.sub.11 316, Lookup Tablef.sub.21 326, Lookup Table f.sub.12 338, and Lookup Table f.sub.22 348 of FIG. 3, respectively. Although shown as being implemented using lookup tables, the predistortion functions can alternatively be implemented algebraically;
h.sub.d[] is the impulse response of each differentiator filter 318, 328, 334, and 344 of FIG. 3;
h.sub.B1[], h.sub.B2[], h.sub.B3[], h.sub.B4[] are the impulse responses of (e.g., linear) Hilbert filters 322, 332, 342, and 352 of FIG. 3 possibly for selecting the different frequencies;
"" represents the complex multiplication operator of complex multipliers 308, 320, 330, 340, and 350 of FIG. 3;
"*" is the convolution operator; and
summation block 312 of FIG. 3 represents the addition operations in Equation (3).
The nonlinear distortion generated when a signal is amplified by an amplifier can comprise both a frequencyindependent portion and a frequencydependent portion. When predistorting the signal prior to its being applied to such an amplifierto precompensate for the amplifier's nonlinear distortion, the predistortion can also comprise both a frequencyindependent portion and a frequencydependent portion. In Equation (2), the first term on the righthand side (RHS) represents thefrequencyindependent portion of the predistortion operation, while the second and third terms represent the frequencydependent portion of the predistortion operation.
In a situation where f.sub.1=f.sub.2=f, the second and third terms would be equivalent to the time derivative of the product of two functions: the distortion function f and the signal "function" x, where h.sub.d represents the derivativefunction, since h.sub.P and h.sub.N represent linear filters that select the positive and negative frequencies, respectively. As such, Equation (2) is equivalent to the derivative of the product of two functions f and x, with the further relaxation(i.e., additional degree of freedom) that the distortion function f is allowed to be two different functions: f.sub.1 for positive frequencies selected by the filter function h.sub.P and f.sub.2 for negative frequencies selected by the filter functionh.sub.N.
Based on the wellknown mathematical expansion, the derivative of the product of first and second two functions is equal to (1) the product of (i) the first function and (ii) the derivative of the second function plus (2) the product of (i) thesecond function and (ii) the derivative of the first function.
As in Equation (2), the first term on the RHS of Equation (3) represents the frequencyindependent portion of the predistortion operation. The second through fifth terms on the RHS of Equation (3) represent the frequencydependent portion ofthe predistortion operation. In particular, the second and fourth terms on the RHS of Equation (3) correspond to the mathematical expansion of the second term on the RHS of Equation (2), with the further potential relaxations (corresponding to twoadditional degrees of freedom) that (i) the function f.sub.1 of Equation (2) can be (but does not have to be) two different functions f.sub.11 and f.sub.12 and (ii) the positivefrequency filter function h.sub.P of Equation (2) can be (but does not haveto be) two different frequencydependent filter functions h.sub.B1 and h.sub.B3. Similarly, the third and fifth terms on the RHS of Equation (3) correspond to the mathematical expansion of the third term on the RHS of Equation (2), with the furtherpotential relaxations (corresponding to two additional degrees of freedom) that (i) the function f.sub.2 of Equation (2) can be (but does not have to be) two different functions f.sub.21 and f.sub.22 and (ii) the negativefrequency filter functionh.sub.N of Equation (2) can be (but does not have to be) two different frequencydependent filter functions h.sub.B2 and h.sub.B4.
Note that, when f.sub.11=f.sub.12 and f.sub.21=f.sub.22 and h.sub.B1=h.sub.B3=h.sub.P and h.sub.B2=h.sub.B4=h.sub.N, then Equation (3) is equivalent to Equation (2). On the other hand, when any one or more of those four equalities is not true,including implementations in which all four equalities are not true, then Equation (3) will be different from Equation (2). Allowing one or more of those four equalities to be false allows Equation (3) to provide greater flexibility than Equation (2) inmodeling the predistortion operation to better compensate for the amplifier's nonlinear distortion, thereby providing improved predistortion performance.
The (nonlinear) polynomial functions f.sub.0(), f.sub.11(), f.sub.12(), f.sub.21(), f.sub.22() and the (linear) filter functions h.sub.B1[], h.sub.B2[], h.sub.B3[], h.sub.B4[] can be generated by an algorithm which minimizes the differencebetween the input signal x[n] and the feedback signal y.sub.fb[n] (see FIG. 1). Such an algorithm could consist of an adaptive filter algorithm such as LMS as described in, for example, S. Haykin, Adaptive Filter Theory (Prentice Hall), or anoptimization algorithm as described in, for example, W. H. Press, B. P. Flannery, S. A. Teukolsky, and W. T. Vetterling, Numerical Recipes: The Art of Scientific Computing (New York: Cambridge University Press, 1986).
Note that one or more of the filter functions h.sub.B1[], h.sub.B2[], h.sub.B3[], h.sub.B4[] may be delays.
Broadening
Although the present invention has been described in the context of linearizing an analog subsystem having a nonlinear amplifier, the invention can also be implemented in other contexts. For example, the invention can be implemented tolinearize an analog subsystem having one or more of the following elements: baseband amplification, IF (intermediate frequency) amplification, RF amplification, frequency upconversion, frequency downconversion, vector modulation. Furthermore, dependingon the frequency requirements of the particular application and the frequency capabilities of the physical components used to implement the various elements, upconverter 132 and/or downconverter 150 of FIG. 1 may be omitted. Note that, in certainimplementations, upconversion and/or downconversion may be partially or even completely implemented in the digital domain. In addition, predistorter 114 might not be adaptive, in which case the entire feedback path of tap 140, downconverter 150, andADC 160 may be omitted.
The present invention may be implemented as (analog, digital, or a hybrid of both analog and digital) circuitbased processes, including possible implementation as a single integrated circuit (such as an ASIC or an FPGA), a multichip module, asingle card, or a multicard circuit pack. As would be apparent to one skilled in the art, various functions of circuit elements may also be implemented as processing blocks in a software program. Such software may be employed in, for example, adigital signal processor, microcontroller, generalpurpose computer, or other processor.
The present invention can be embodied in the form of methods and apparatuses for practicing those methods. The present invention can also be embodied in the form of program code embodied in tangible media, such as magnetic recording media,optical recording media, solid state memory, floppy diskettes, CDROMs, hard drives, or any other nontransitory machinereadable storage medium, wherein, when the program code is loaded into and executed by a machine, such as a computer, the machinebecomes an apparatus for practicing the invention. The present invention can also be embodied in the form of program code, for example, stored in a nontransitory machinereadable storage medium including being loaded into and/or executed by a machine,wherein, when the program code is loaded into and executed by a machine, such as a computer, the machine becomes an apparatus for practicing the invention. When implemented on a generalpurpose processor, the program code segments combine with theprocessor to provide a unique device that operates analogously to specific logic circuits.
It should be appreciated by those of ordinary skill in the art that any block diagrams herein represent conceptual views of illustrative circuitry embodying the principles of the invention. Similarly, it will be appreciated that any flowcharts, flow diagrams, state transition diagrams, pseudo code, and the like represent various processes which may be substantially represented in computer readable medium and so executed by a computer or processor, whether or not such computer orprocessor is explicitly shown.
Unless explicitly stated otherwise, each numerical value and range should be interpreted as being approximate as if the word "about" or "approximately" preceded the value of the value or range.
It will be further understood that various changes in the details, materials, and arrangements of the parts which have been described and illustrated in order to explain the nature of this invention may be made by those skilled in the artwithout departing from the scope of the invention as expressed in the following claims.
The use of figure numbers and/or figure reference labels in the claims is intended to identify one or more possible embodiments of the claimed subject matter in order to facilitate the interpretation of the claims. Such use is not to beconstrued as necessarily limiting the scope of those claims to the embodiments shown in the corresponding figures.
It should be understood that the steps of the exemplary methods set forth herein are not necessarily required to be performed in the order described, and the order of the steps of such methods should be understood to be merely exemplary. Likewise, additional steps may be included in such methods, and certain steps may be omitted or combined, in methods consistent with various embodiments of the present invention.
Although the elements in the following method claims, if any, are recited in a particular sequence with corresponding labeling, unless the claim recitations otherwise imply a particular sequence for implementing some or all of those elements,those elements are not necessarily intended to be limited to being implemented in that particular sequence.
Reference herein to "one embodiment" or "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the invention. The appearances ofthe phrase "in one embodiment" in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments necessarily mutually exclusive of other embodiments. The same applies to the term"implementation."
The embodiments covered by the claims in this application are limited to embodiments that (1) are enabled by this specification and (2) correspond to statutory subject matter. Nonenabled embodiments and embodiments that correspond tononstatutory subject matter are explicitly disclaimed even if they fall within the scope of the claims.
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