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Toyoaki Yamamoto Patents |
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Inventor: Yamamoto; Toyoaki
Address: Tokyo, JP
No. of patents: 1
Patents:
| Patent Number |
Title Of Patent |
Date Issued |
| 7373566 |
Semiconductor device for accurate measurement of time parameters in operation |
May 13, 2008 |
| A memory-logics LSI device forms an input/output path for testing. A memory device has a memory input/output unit,which includes an input/output selector with test function. A test clock signal, which is directly supplied in the test mode, is used to selectively take in one of input |
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