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Robert Gideon Wodnicki Patents
Inventor:
Wodnicki; Robert Gideon
Address:
Niskayuna, NY
No. of patents:
21
Patents:




Patent Number Title Of Patent Date Issued
7353056 Optimized switching configurations for reconfigurable arrays of sensor elements April 1, 2008
The reconfigurable ultrasound array disclosed herein is one that allows groups of subelements to be connected together dynamically so that the shape of the resulting element can be made to match the shape of the wave front. This can lead to improved performance and/or reduced channel
7313053 Method and apparatus for controlling scanning of mosaic sensor array December 25, 2007
A scanning architecture that makes it possible to update only those ultrasonic transducer subelements of a mosaic transducer array that change from view to view. The configuration of the switch matrix is fully programmable. The switch matrix includes access switches that connect sube
7280435 Switching circuitry for reconfigurable arrays of sensor elements October 9, 2007
A device comprising an array of sensors that are reconfigurable by means of a switching network. The sensors may be optical, thermal or pressure sensors or ultrasonic transducers. More specifically, the device comprises: a multiplicity of sensor elements; a plurality of bus lines; a
7257051 Integrated interface electronics for reconfigurable sensor array August 14, 2007
An integrated switch matrix for reconfiguring subelements of a mosaic sensor array to form elements. The configuration of the switch matrix is fully programmable. The switch matrix includes access switches that connect subelements to bus lines and matrix switches that connect subelem
7127656 Turbo decoder control for use with a programmable interleaver, variable block length, and multip October 24, 2006
A turbo decoder control comprises an address generator for addressing systematic data, parity data, and systematic likelihood ratios according to a pre-determined memory mapping. The systematic data samples are accessed in the order required by the MAP decoding algorithm such that in
6975752 Imaging system including detector framing node December 13, 2005
An imaging system includes a programmable detector framing node controlling generation of radiation and controlling radioscopic image detection. Radioscopic image data is acquired and communicated independently of a host computer operating system. The detector framing node controls event
6970586 Detector framing node architecture to communicate image data November 29, 2005
A detector framing node controls generation of radiation and radioscopic image detection Radioscopic image data is acquired and communicated independently of a host computer operating system. The detector framing node controls events in real time according to an event instruction seq
6956426 Integrated high-voltage switching circuit for ultrasound transducer array October 18, 2005
An integrated high-voltage switching circuit includes a switch having ON and OFF states and having a parasitic gate capacitance. The switch consists of a pair of DMOS transistors integrated back to back and having a shared gate terminal, the drains of the DMOS transistors being connected
6904124 Indirect programming of detector framing node June 7, 2005
A real time imaging system includes a programmable detector framing node controlling generation of radiation and controlling radioscopic image detection. Radioscopic image data is acquired and communicated by the detector framing node independently of a host computer operating system.
6901159 Communication of image data from image detector to host computer May 31, 2005
An imaging system includes a programmable detector framing node controlling generation of radiation and controlling radioscopic image detection. Radioscopic image data is acquired by the detector framing node and communicated to a host memory of a host computer independently of a host
6836159 Integrated high-voltage switching circuit for ultrasound transducer array December 28, 2004
An integrated high-voltage switching circuit includes a switch having ON and OFF states and having a parasitic gate capacitance. The switch consists of a pair of DMOS transistors integrated back to back and having a shared gate terminal, the drains of the DMOS transistors being connected
6715120 Turbo decoder with modified input for increased code word length and data rate March 30, 2004
A turbo decoder system utilizing a MAP decoding algorithm has a predetermined number of turbo decoder modules for decoding segments of a turbo code component code word in parallel, thereby expanding the block-length and data rate capability of the turbo decoder. Upon completion of an
6594792 Modular turbo decoder for expanded code word length July 15, 2003
A turbo decoder system utilizing a MAP decoding algorithm has a predetermined number of turbo decoder modules for decoding segments of a turbo code component code word in parallel, thereby expanding the block-length and data-rate capability of the turbo decoder system. Input data sam
6516437 Turbo decoder control for use with a programmable interleaver, variable block length, and multip February 4, 2003
A turbo decoder control comprises an address generator for addressing systematic data, parity data, and systematic likelihood ratios according to a pre-determined memory mapping. The systematic data samples are accessed in the order required by the MAP decoding algorithm such that in
6504895 Method and system monitoring image detection January 7, 2003
An image detector monitoring system includes a detector framing node and a host computer having at least one host processor and a host memory. The detector framing node acquires image data, buffers the acquired image data, and outputs the image data to the host memory according to a
6470071 Real time data acquisition system including decoupled host computer October 22, 2002
A real time data acquisition system includes a personal computer and a detector framing node cooperating to control generation of radiation and control radiographic detection. Data is acquired by a detector framing node and communicated independently of a non-real time operating system
6404851 Method and apparatus for automatic exposure control using localized capacitive coupling in a mat June 11, 2002
A method and system for an automatic exposure control (AEC) arrangement for a matrix-addressed imaging panel having an array of sensors including use of localized regions of the imaging panel exhibiting capacitive coupling. In one embodiment, the matrix-addressed imaging panel includes o
6304996 High-speed turbo decoder October 16, 2001
A high-speed turbo decoder utilizes a MAP decoding algorithm and includes a streamlined construction of functional units, or blocks, amenable to ASIC implementation. A gamma block provides symbol-by-symbol a posteriori state transition probability estimates. Two gamma probability functio
6246275 Multi-phase programmable clock generator June 12, 2001
The present invention provides a clocked comparator which extends the time period before an input signal is measured to include most of the clock cycle, thereby increasing the amount of time available for the input signal to achieve a "steady-state" condition. After the input signal
6037821 Digital programmable clock generator with improved accuracy March 14, 2000
A programmable clock circuit generates a plurality of phase clock signals in correspondence with an associated control word programmed into a memory. Programmable clock circuit is implemented digitally in an application specific integrated circuit. Each phase clock signal is synchron
6037809 Apparatus and method for a high frequency clocked comparator and apparatus for multi-phase progr March 14, 2000
The present invention provides a clocked comparator which extends the time period before an input signal is measured to include most of the clock cycle, thereby increasing the amount of time available for the input signal to achieve a "steady-state" condition. After the input signal


 
 
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