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Greg D. U'Ren Patents
Inventor:
U'Ren; Greg D.
Address:
Corona del Mar, CA
No. of patents:
14
Patents:




Patent Number Title Of Patent Date Issued
7335547 Method for effective BiCMOS process integration February 26, 2008
According to an exemplary embodiment, a method for integrating bipolar and CMOS devices on a substrate, where the substrate includes bipolar and CMOS regions and has a sacrificial oxide layer situated thereon, includes removing a portion of the sacrificial oxide layer in the bipolar regi
7297992 Method and structure for integration of phosphorous emitter in an NPN device in a BiCMOS process November 20, 2007
According to one exemplary embodiment, a heterojunction bipolar transistor includes a base situated on a substrate. The heterojunction bipolar transistor can be an NPN silicon-germanium heterojunction bipolar transistor, for example. The heterojunction bipolar transistor further incl
7291898 Selective and non-selective epitaxy for base integration in a BiCMOS process and related structu November 6, 2007
According to one exemplary embodiment, a bipolar transistor includes an active area situated between first and second isolation regions in a substrate. The bipolar transistor further includes an epitaxial extension layer situated on the active area, where the epitaxial extension layer
7235861 NPN transistor having reduced extrinsic base resistance and improved manufacturability June 26, 2007
A method for fabricating an NPN bipolar transistor comprises forming a base layer on a top surface of a substrate. The NPN bipolar transistor may be an NPN silicon-germanium heterojunction bipolar transistor. The method for fabricating the NPN bipolar transistor may further comprise a
7064361 NPN transistor having reduced extrinsic base resistance and improved manufacturability June 20, 2006
According to one exemplary embodiment, an NPN bipolar transistor comprises a base layer situated over a collector, where the base layer comprises an intrinsic base region and an extrinsic base region. The NPN bipolar transistor may be, for example, an NPN silicon-germanium heterojunction
6893931 Reducing extrinsic base resistance in an NPN transistor May 17, 2005
A method for fabricating an NPN bipolar transistor comprises forming a base layer on a top surface of a substrate. The NPN bipolar transistor may be an NPN silicon-germanium heterojunction bipolar transistor. The method for fabricating the NPN bipolar transistor may further comprise a ca
6830982 Method for reducing extrinsic base resistance and improving manufacturability in an NPN transist December 14, 2004
According to one exemplary embodiment, an NPN bipolar transistor comprises a base layer situated over a collector, where the base layer comprises an intrinsic base region and an extrinsic base region. The NPN bipolar transistor may be, for example, an NPN silicon-germanium heterojunction
6781214 Metastable base in a high-performance HBT August 24, 2004
According to one exemplary embodiment, a heterojunction bipolar transistor is fabricated by forming a metastable epitaxial silicon-germaniuim base on a collector. The metastable epitaxial silicon-germanium base, for example, may have a concentration of germanium greater than 20.0 atomic
6759674 Band gap compensated HBT July 6, 2004
According to one exemplary embodiment, a heterojunction bipolar transistor comprises a base having a concentration of a first material at a first depth, where the first material impedes the diffusion of a base dopant. The first material also causes a change in band gap at the first depth
6680235 Method for fabricating a selective eptaxial HBT emitter January 20, 2004
According to one exemplary embodiment, a heterojunction bipolar transistor comprises a base having a top surface. The heterojunction bipolar transistor further comprises an epitaxial emitter selectively situated on the top surface of the base. For example, the epitaxial emitter may be
6673688 Method for eliminating collector-base band gap in an HBT January 6, 2004
According to one exemplary embodiment, a heterojunction bipolar transistor comprises a base having a concentration of germanium, where the concentration of germanium decreases between a first depth and a second depth in the base. According to this exemplary embodiment, the base of the
6639256 Structure for eliminating collector-base band gap discontinuity in an HBT October 28, 2003
According to one exemplary embodiment, a heterojunction bipolar transistor comprises a base having a concentration of germanium, where the concentration of germanium decreases between a first depth and a second depth in the base. According to this exemplary embodiment, the base of the
6617619 Structure for a selective epitaxial HBT emitter September 9, 2003
According to one exemplary embodiment, a heterojunction bipolar transistor comprises a base having a top surface. The heterojunction bipolar transistor further comprises an epitaxial emitter selectively situated on the top surface of the base. For example, the epitaxial emitter may be
6586297 Method for integrating a metastable base into a high-performance HBT and related structure July 1, 2003
According to one exemplary embodiment, a heterojunction bipolar transistor is fabricated by forming a metastable epitaxial silicon-germaniuim base on a collector. The metastable epitaxial silicon-gernaniuim base, for example, may have a concentration of germanium greater than 20.0 atomic


 
 
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