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Akinobu Teramoto Patents
Inventor:
Teramoto; Akinobu
Address:
Sendai, JP
No. of patents:
11
Patents:




Patent Number Title Of Patent Date Issued
7411274 Silicon semiconductor substrate and its manufacturing method August 12, 2008
The present invention has been made in order to manufacture a silicon semiconductor substrate used for a semiconductor integrated circuit device, higher in carrier mobility, especially in electron mobility, which is a carrier of an n-type FET, on a {100} plane as a main surface, and
7179746 Method of surface treatment for manufacturing semiconductor device February 20, 2007
In a semiconductor device formed on a silicon surface which has a substantial (110) crystal plane orientation, the silicon surface is flattened so that an arithmetical mean deviation of surface Ra is not greater than 0.15 nm, preferably, 0.09 nm, which enables to manufacture an n-MOS
6756647 Semiconductor device including nitride layer June 29, 2004
A semiconductor device includes an n-type semiconductor substrate including a source region and a drain region in a main surface thereof, a high-permittivity insulator film including a high permittivity material and formed to cover an upper side of a region of the main surface of n-t
6753233 Method of manufacturing semiconductor device, and semiconductor device having memory cell June 22, 2004
A gate oxide film is formed on a substrate. Next, gate interconnections, each including a first silicon film, a silicide film and a dielectric film, are formed on the gate oxide film. Next, an impurity is implanted into the substrate while the gate interconnections are taken as a mask,
6720601 Semiconductor device comprising a gate conductive layer with a stress mitigating film thereon April 13, 2004
A semiconductor device having a structure in which the amount of stress on a semiconductor substrate or a gate wire is low, even in a case when the sidewalls of the gate wire are formed of a nitride film is obtained. A gate conductive layer positioned above a silicon substrate, a stress
6683004 Method of manufacturing a semiconductor device, and semiconductor device manufactured thereby January 27, 2004
There is described prevention of an increase in the thickness of an oxide film of a silicon wafer, which would otherwise be caused by eruption of gas from a CVD oxide film of another wafer during the course of a high-temperature annealing operation. A semiconductor device, which has a
6649969 Nonvolatile semiconductor device November 18, 2003
The invention provides a nonvolatile semiconductor device, or the like. According to the fabrication process of the present invention, silica glass containing boron or phosphorous is used as a material of high absorbency, which is treated in the vapor phase HF atmosphere and, therefo
6638803 Semiconductor device and method for manufacturing the same October 28, 2003
Isolation regions 12 are formed on a silicon substrate 10 to isolate NMOS and PMOS regions in which to form NMOS and PMOS transistors respectively. A silicon oxide film 14 and an amorphous silicon film 16 are formed as a gate insulating film on the silicon substrate 10. N-type impurities
6521509 Semiconductor device and method of manufacturing the same February 18, 2003
A highly reliable semiconductor device is provided. A silicon nitride film having an opening is formed on a main surface of a silicon substrate. The opening is formed with a side surface. The silicon substrate is etched using the silicon nitride film as a mask to form a trench. The side
6472700 Semiconductor device with isolation insulator, interlayer insulation film, and a sidewall coatin October 29, 2002
A semiconductor device capable of suppressing increase in the junction leakage current and preventing deterioration in the electric characteristics even when the device is miniaturized, and a method of manufacturing thereof are attained. The semiconductor device includes a semiconduc
6221771 Method of forming tungsten silicide film, method of fabricating semiconductor devices and semico April 24, 2001
A silicon wafer is disposed in an inert gas atmosphere, and the temperature thereof is raised, and dichlorosilane is introduced to cause a surface reaction of the silicon wafer to occur, and then dichlorosilane to which WF.sub.6 is added is introduced so as to deposit tungsten silicide t


 
 
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