| |
 |
Osamu Tachibana Patents |
|
Inventor: Tachibana; Osamu
Address: Matsuyama, JP
No. of patents: 1
Patents:
| Patent Number |
Title Of Patent |
Date Issued |
| 5481489 |
Method of and apparatus for discriminating NaN |
January 2, 1996 |
| When processing a binary floating-point number in the IEEE form, whether or not the data is NaN can be discriminated irrespective of a precision thereof. The binary floating-point number having sign, exponent and fraction parts is based on the IEEE form in which the data is defined as |
|
|
|
