| Patent Number |
Title Of Patent |
Date Issued |
| 7405032 |
Combination of non-lithographic shrink techniques and trim process for gate formation and line-e |
July 29, 2008 |
| The present invention relates generally to photolithographic systems and methods, and more particularly to systems and methodologies that facilitate the reduction of line-edge roughness (LER) during gate formation in an integrated circuit.Systems and methods are disclosed for improvi |
| 7386162 |
Post fabrication CD modification on imprint lithography mask |
June 10, 2008 |
| The present invention relates generally to photolithographic systems and methods, and more particularly to systems and methodologies that facilitate compensating for imprint mask critical dimension error(s). An aspect of the invention generates feedback information that facilitates c |
| 7384569 |
Imprint lithography mask trimming for imprint mask using etch |
June 10, 2008 |
| Disclosed are photolithographic systems and methods, and more particularly systems and methodologies that enhance imprint mask feature resolution. An aspect generates feedback information that facilitates control of imprint mask feature size and resolution via employing a scatterometry |
| 7381278 |
Using supercritical fluids to clean lenses and monitor defects |
June 3, 2008 |
| Disclosed are immersion lithography methods involving irradiating a first photoresist through a lens and an immersion liquid, the immersion liquid contacting the lens and the first photoresist in a first apparatus; contacting the lens with a supercritical fluid in a second apparatus; and |
| 7376259 |
Topography compensation of imprint lithography patterning |
May 20, 2008 |
| The present invention relates generally to photolithographic systems and methods, and more particularly to systems and methodologies that modify an imprint mask. An aspect of the invention generates feedback information that facilitates control of imprint mask feature height via empl |
| 7373215 |
Transistor gate shape metrology using multiple data sources |
May 13, 2008 |
| The claimed subject matter can provide a mechanism for ascertaining a variety of metrological data relating to one or more features (e.g., a transistor gate) of a chip/wafer. In addition, results of electrical testing on the chip/wafer can also be gathered and, together with the metr |
| 7334202 |
Optimizing critical dimension uniformity utilizing a resist bake plate simulator |
February 19, 2008 |
| A system for optimizing critical dimension uniformity in semiconductor manufacturing processes is provided. The system comprises a bake plate simulator to model a physical bake plate. A finite element analysis engine uses information from the bake plate simulator to calculate missing |
| 7310155 |
Extraction of tool independent line-edge-roughness (LER) measurements using in-line programmed L |
December 18, 2007 |
| A system that facilitates extraction of line edge roughness measurements that are independent of proprietorship of a metrology device comprises a structure patterned onto silicon with known line edge roughness values associated therewith. A metrology device obtains line edge roughness |
| 7309659 |
Silicon-containing resist to pattern organic low k-dielectrics |
December 18, 2007 |
| The disclosure provides methods to mitigate and/or eliminate problems associated with removal of carbon-based resists from organic low k dielectrics. The methods include forming an organic low k dielectric layer over a semiconductor substrate, forming a capping layer over the organic |
| 7305645 |
Method for manufacturing place & route based on 2-D forbidden patterns |
December 4, 2007 |
| The present invention is directed towards a system and/or methodology that facilitates controlling routing of blocks on a floor plan in an integrated circuit. A pattern collector receives a partially created routing pattern, and a comparing component makes a comparison between the at |
| 7295288 |
Systems and methods of imprint lithography with adjustable mask |
November 13, 2007 |
| Systems and methodologies are provided that account for surface variations of a wafer by adjusting grating features of an imprint lithography mask. Such adjustment employs piezoelectric elements as part of the mask, which can change dimensions (e.g., a height change) and/or move when sub |
| 7289193 |
Frame structure for turbulence control in immersion lithography |
October 30, 2007 |
| Disclosed are systems and methods that employ a structural framework of cell gratings placed on a wafer surface during an immersion lithography process to restrict motion of the immersion fluid. Thus, when the stepper lens comes in contact with the immersion fluid, a typically stable |
| 7262422 |
Use of supercritical fluid to dry wafer and clean lens in immersion lithography |
August 28, 2007 |
| Disclosed are immersion lithography methods and systems involving irradiating a photoresist through a lens and an immersion liquid of an immersion lithography tool, the immersion liquid in an immersion space contacting the lens and the photoresist; removing the immersion liquid from |
| 7262138 |
Organic BARC with adjustable etch rate |
August 28, 2007 |
| Systems and method for adjusting an etch rate of an organic bottom antireflective coating (BARC) layer on a wafer. The BARC layer can be exposed to an energy source at varied intensities to determine a relationship between bake temperature and solubility of the BARC after baking, whi |
| 7251033 |
In-situ reticle contamination detection system at exposure wavelength |
July 31, 2007 |
| A system and method are provided for detecting contaminants or defects on a reticle in-situ. The system and method provide a system that measures the optical transmission through clear areas on a reticle and determines whether the optical transmission of a reticle has been degraded by |
| 7235474 |
System and method for imprint lithography to facilitate dual damascene integration with two impr |
June 26, 2007 |
| A system and method are provided to facilitate dual damascene interconnect integration with two imprint acts. The method provides for creation of a pair of translucent imprint molds containing the dual damascene pattern to be imprinted. The first imprint mold of the pair contains the via |
| 7235414 |
Using scatterometry to verify contact hole opening during tapered bilayer etch |
June 26, 2007 |
| Systems and methods are described that facilitate verifying that bottom apertures in tapered vias are open and free of obstruction. Scatterometry can be employed to monitor tapered via formation during and/or after a dry etch process on a photoresist bilayer. Information regarding critic |
| 7224456 |
In-situ defect monitor and control system for immersion medium in immersion lithography |
May 29, 2007 |
| A system and method for detecting bubbles in a lithographic immersion medium and for controlling a lithographic process based at least in part on the detection of bubbles is provided. A bubble monitoring component emits an incident beam that passes through the immersion medium and is |
| 7221060 |
Composite alignment mark scheme for multi-layers in lithography |
May 22, 2007 |
| Systems and/or methods are disclosed for aligning multiple layers of a multi-layer semiconductor device fabrication process and/or system utilizing a composite alignment mark. A component is provided to form the composite alignment mark, such that a first portion of the composite ali |
| 7187796 |
Systems and methods that employ exposure compensation to provide uniform CD control on reticle d |
March 6, 2007 |
| The present invention relates to monitoring and controlling a reticle fabrication process (e.g. employed with an electron beam lithography process). A typical fabrication process involves discrete stages including exposure, post-exposure bake and development. After fabrication is com |
| 7173648 |
System and method for visually monitoring a semiconductor processing system |
February 6, 2007 |
| The present invention relates to visually monitoring an interior portion of a processing chamber in a semiconductor processing system. An image collector collects images of the interior of the chamber and provides an image signal indicative of a visual representation of the interior of t |
| 7159205 |
Use of non-lithographic shrink techniques for fabrication/making of imprints masks |
January 2, 2007 |
| The present invention relates generally to photolithographic systems and methods, and more particularly to systems and methodologies that facilitate improved critical dimension (CD) control and the reduction of line-edge roughness (LER) during pattern line formation in an imprint mas |
| 7158896 |
Real time immersion medium control using scatterometry |
January 2, 2007 |
| Systems and/or methods are disclosed for measuring and/or controlling an amount of impurity that is dissolved within an immersion medium employed with immersion lithography. The impurity can be photoresist from a photoresist layer coated upon a substrate surface. A known grating stru |
| 7156925 |
Using supercritical fluids to clean lenses and monitor defects |
January 2, 2007 |
| Disclosed are immersion lithography methods involving irradiating a first photoresist through a lens and an immersion liquid, the immersion liquid contacting the lens and the first photoresist in a first apparatus; contacting the lens with a supercritical fluid in a second apparatus; and |
| 7148142 |
System and method for imprint lithography to facilitate dual damascene integration in a single i |
December 12, 2006 |
| A system and method are provided to facilitate dual damascene interconnect integration in a single imprint step. The method provides for creation of a translucent imprint mold with three-dimensional features comprising the dual damascene pattern to be imprinted. The imprint mold is broug |
| 7109046 |
Surface oxide tabulation and photo process control and cost savings |
September 19, 2006 |
| The present invention relates generally to semiconductor processing, and more particularly to methods and systems for reducing costs of wafer production by analyzing key aspects of wafer status to determine whether to initiate corrective measures to salvage a wafer at an early stage and |
| 7108946 |
Method of lithographic image alignment for use with a dual mask exposure technique |
September 19, 2006 |
| Methods of fabricating an integrated circuit on a wafer using dual mask exposure lithography is disclosed. Improved mask image alignment between a first mask image and a second mask image of a dual mask exposure technique can be achieved by aligning the second mask image to a latent |
| 7100826 |
Barcode marking of wafer products for inventory control |
September 5, 2006 |
| A system for performing inventory control for wafers, unpackaged integrated circuits and packaged integrated circuits is provided. The system includes barcode readers, sorters and transporters operable to locate and relocate wafers, unpackaged circuits and packaged circuits. The syst |
| 7084988 |
System and method for creation of semiconductor multi-sloped features |
August 1, 2006 |
| A system and method for monitoring the creation of semiconductor features with multi-slope profiles by employing scatterometry is provided. The system includes a wafer partitioned into one or more portions and one or more light sources, each light source directing light to one or more |
| 7080330 |
Concurrent measurement of critical dimension and overlay in semiconductor manufacturing |
July 18, 2006 |
| A system and methodology are disclosed for monitoring and controlling a semiconductor fabrication process. One or more structures formed on a wafer matriculating through the process facilitate concurrent measurement of critical dimensions and overlay via scatterometry or a scanning e |
| 7079975 |
Scatterometry and acoustic based active control of thin film deposition process |
July 18, 2006 |
| A system for monitoring and controlling the deposition of thin films employed in semiconductor fabrication is provided. The system includes one or more acoustic and/or ultrasonic wave sources, each source directing waves onto one or more thin films deposited on a wafer. Waves reflect |
| 7078348 |
Dual layer patterning scheme to make dual damascene |
July 18, 2006 |
| One aspect of the present invention relates to a method for making a dual damascene pattern in an insulative layer in a single etch process involving providing a wafer having at least one insulative layer formed thereon; depositing a first photoresist layer over the at least one insu |
| 7076320 |
Scatterometry monitor in cluster process tool environment for advanced process control (APC) |
July 11, 2006 |
| Systems and methods that improve process control in semiconductor manufacturing are disclosed. According to an aspect of the invention, conditions in a cluster tool environment and/or a wafer therein can be monitored in-situ via, for example, a scatterometry system, to determine whet |
| 7069155 |
Real time analytical monitor for soft defects on reticle during reticle inspection |
June 27, 2006 |
| The present invention generally relates to semiconductor processing, and in particular to methods and systems for analyzing photolithographic reticle defects that include detecting soft defects on a reticle and analyzing the material composition of the defects for a particular chemic |
| 7065737 |
Multi-layer overlay measurement and correction technique for IC manufacturing |
June 20, 2006 |
| A system facilitating measurement and correction of overlay between multiple layers of a wafer is disclosed. The system comprises an overlay target that represents overlay between three or more layers of a wafer and a measurement component that determines overlay error existent in the |
| 7065427 |
Optical monitoring and control of two layers of liquid immersion media |
June 20, 2006 |
| A multi-layer immersion medium monitoring system for a lithographic process monitors characteristics of an immersion medium of a semiconductor manufacturing process. The multi-layer immersion medium includes at least a first liquid of a first density (or viscosity) and a second liqui |
| 7064846 |
Non-lithographic shrink techniques for improving line edge roughness and using imperfect (but si |
June 20, 2006 |
| The present invention relates generally to photolithographic systems and methods, and more particularly to systems and methodologies that facilitate the reduction of line-edge roughness (LER) and/or standing wave expression during pattern line formation in an integrated circuit. Syst |
| 7056646 |
Use of base developers as immersion lithography fluid |
June 6, 2006 |
| Disclosed are immersion lithography methods involving using a base developer as an immersion lithography fluid. Consequently, it is unnecessary to contact a developer with an irradiated resist after the immersion lithography fluid is removed. |
| 7052921 |
System and method using in situ scatterometry to detect photoresist pattern integrity during the |
May 30, 2006 |
| The present invention uses in situ scatterometry to determine if a defect (e.g., photoresist erosion, photoresist bending and pattern collapse) is present on a wafer. In one embodiment, in situ scatterometry is used to detect a pattern integrity defect associated with the layer of ph |
| 7052575 |
System and method for active control of etch process |
May 30, 2006 |
| A system for regulating an etch process is provided. The system includes one or more light sources, each light source directing light to one or more features and/or gratings on a wafer. Light reflected from the features and/or gratings is collected by a measuring system, which proces |
| 7008832 |
Damascene process for a T-shaped gate electrode |
March 7, 2006 |
| A damascene process can be utilized to form a T-shaped gate. A silicon rich nitride or SiON layer can be etched to form a first aperture. An oxide layer can be provided above the silicon rich nitride layer or SiON layer. A second aperture or trench can be provided in the oxide layer. |
| 7001830 |
System and method of pattern recognition and metrology structure for an X-initiative layout desi |
February 21, 2006 |
| The present invention relates to inspection methods and systems utilized to provide a best means for inspection of a wafer. The methods and systems include wafer-to-reticle alignment, layer-to-layer alignment and wafer surface feature inspection. The wafer-to-reticle alignment is imp |
| 6999254 |
Refractive index system monitor and control for immersion lithography |
February 14, 2006 |
| A system and/or method are disclosed for measuring and/or controlling refractive index (n) and/or lithographic constant (k) of an immersion medium utilized in connection with immersion lithography. A known grating structure is built upon a substrate. A refractive index monitoring com |
| 6995433 |
Microdevice having non-linear structural component and method of fabrication |
February 7, 2006 |
| A microdevice for forming a part of an integrated circuit and method for fabricating are disclosed. The microdevice can include a first conductive region and a second conductive region having a channel region interposed therebetween. The mircodevice has a channel region controlling compo |
| 6982043 |
Scatterometry with grating to observe resist removal rate during etch |
January 3, 2006 |
| Disclosed are a system and method for monitoring a patterned photoresist clad-wafer structure undergoing an etch process. The system includes a semiconductor wafer structure comprising a substrate, one or more intermediate layers overlying the substrate, and a first patterned photore |
| 6974652 |
Lithographic photomask and method of manufacture to improve photomask test measurement |
December 13, 2005 |
| A photomask for use in a lithographic process and a method of making a photomask are disclosed. A mask blank including a substrate, a sacrificial conductive layer disposed over the substrate and a radiation shielding layer disposed over the sacrificial conductive layer can be provided. |
| 6972576 |
Electrical critical dimension measurement and defect detection for reticle fabrication |
December 6, 2005 |
| A system for testing a reticle used in semiconductor wafer fabrication is provided. The system includes a reticle that has an opaque metal layer over a translucent substrate. The reticle includes one or more test features containing probe points operable for electrical contact. The s |
| 6972201 |
Using scatterometry to detect and control undercut for ARC with developable BARCs |
December 6, 2005 |
| Architecture for monitoring a bottom anti-reflective coating (BARC) undercut and residual portions thereof during a development stage using scatterometry. The scatterometry system monitors for BARC undercut and residual BARC material, and if detected, controls the process to minimize |
| 6954678 |
Artificial intelligence system for track defect problem solving |
October 11, 2005 |
| A system and method facilitating lithography defect solution generation is provided. The invention includes a defect solution component and a defect alert component. The defect solution component provides potential solution(s) to a defect within the lithography process utilizing arti |
| 6934032 |
Copper oxide monitoring by scatterometry/ellipsometry during nitride or BLOK removal in damascen |
August 23, 2005 |
| A system and methodology for monitoring and/or controlling a semiconductor fabrication process is disclosed. Scatterometry and/or ellipsometry based techniques can be employed to facilitate providing measurement signals during a damascene phase of the fabrication process. The thickness o |
