| Patent Number |
Title Of Patent |
Date Issued |
| 7385844 |
Semiconductor device and method of controlling the same |
June 10, 2008 |
| A semiconductor device includes: a memory cell array that has a plurality of non-volatile memory cells each having a first bit and a second bit in different regions in a charge storing layer; an SRAM array (first memory unit) that stores data to be written into the memory cell array; a W |
| 7372743 |
Controlling a nonvolatile storage device |
May 13, 2008 |
| A control method for a nonvolatile storage device having a storage mode in which in a memory cell provided with a trapping dielectric layer 1-bit data is stored depending on the presence or absence of charge in a first trapping region. In a dynamic reference cell initialization operation |
| 7362620 |
Semiconductor device and method of controlling the same |
April 22, 2008 |
| A semiconductor device (1) includes a non-volatile memory cell array (2), a write/read circuit (30) writing data into and reading data from the non-volatile memory cell array (2), a data input/output circuit (80), and a volatile memory cell array (40) including a first latch circuit (41) |
| 6768682 |
Nonvolatile semiconductor memory and method for controlling programming voltage of nonvolatile s |
July 27, 2004 |
| When data is programmed into nonvolatile memory cells, a programming voltage is applied, with increasing, to the memory cells a plurality of times. During this data programming, the increment of the programming voltage is set to a first voltage, which is maintained until the threshold |
