| Patent Number |
Title Of Patent |
Date Issued |
| 7402466 |
Strained silicon CMOS on hybrid crystal orientations |
July 22, 2008 |
| Methods of forming a strained Si-containing hybrid substrate are provided as well as the strained Si-containing hybrid substrate formed by the methods. In the methods of the present invention, a strained Si layer is formed overlying a regrown semiconductor material, a second semicond |
| 7365399 |
Structure and method to form semiconductor-on-pores (SOP) for high device performance and low ma |
April 29, 2008 |
| A semiconducting material that has all the advantages of prior art SOI substrates including, for example, low parasitic capacitance and leakage, without having floating body effects is provided. More specifically, the present invention provides a Semiconductor-on-Pores (SOP) material tha |
| 7358166 |
Relaxed, low-defect SGOI for strained Si CMOS applications |
April 15, 2008 |
| Thermal mixing methods of forming a substantially relaxed and low-defect SGOI substrate material are provided. The methods include a patterning step which is used to form a structure containing at least SiGe islands formed atop a Ge resistant diffusion barrier layer. Patterning of the |
| 7348633 |
Hybrid crystallographic surface orientation substrate having one or more SOI regions and/or bulk |
March 25, 2008 |
| A substrate for a semiconductor device is disclosed including, in one embodiment, a plurality of semiconductor-on-insulator (SOI) wafers bonded to one another in a single stack. A distal end of the stack includes a first SOI region with a first semiconductor layer having a thickness and |
| 7348253 |
High-quality SGOI by annealing near the alloy melting point |
March 25, 2008 |
| A method of forming a low-defect, substantially relaxed SiGe-on-insulator substrate material is provided. The method includes first forming a Ge-containing layer on a surface of a first single crystal Si layer which is present atop a barrier layer that is resistant to Ge diffusion. A |
| 7329596 |
Method for tuning epitaxial growth by interfacial doping and structure including same |
February 12, 2008 |
| A method that allows for uniform, simultaneous epitaxial growth of a semiconductor material on dissimilarly doped semiconductor surfaces (n-type and p-type) that does not impart substrate thinning via a novel surface preparation scheme, as well as a structure that results from the im |
| 7317226 |
Patterned SOI by oxygen implantation and annealing |
January 8, 2008 |
| Methods for forming a patterned SOI region in a Si-containing substrate is provided which has geometries of about 0.25 .mu.m or less. Specifically, one method includes the steps of: forming a patterned dielectric mask on a surface of a Si-containing substrate, wherein the patterned diele |
| 7315065 |
Method for fabricating SiGe-on-insulator (SGOI) and Ge-on-insulator (GOI) substrates |
January 1, 2008 |
| A method for fabricating germanium-on-insulator (GOI) substrate materials, the GOI substrate materials produced by the method and various structures that can include at least the GOI substrate materials of the present invention are provided. The GOI substrate material include at least a |
| 7304328 |
Use of hydrogen implantation to improve material properties of silicon-germanium-on-insulator ma |
December 4, 2007 |
| A method of forming a relaxed SiGe-on-insulator substrate having enhanced relaxation, significantly lower defect density and improved surface quality is provided. The method includes forming a SiGe alloy layer on a surface of a first single crystal Si layer. The first single crystal Si |
| 7253034 |
Dual SIMOX hybrid orientation technology (HOT) substrates |
August 7, 2007 |
| This invention provides a separation by implanted oxygen (SIMOX) method for forming planar hybrid orientation semiconductor-on-insulator (SOI) substrates having different crystal orientations, thereby making it possible for devices to be fabricated on crystal orientations providing o |
| 7247569 |
Ultra-thin Si MOSFET device structure and method of manufacture |
July 24, 2007 |
| The present invention comprises a method for forming an ultra-thin channel MOSFET and the ultra-thin channel MOSFET produced therefrom. Specifically, the method comprises providing an SOI substrate having a buried insulating layer underlying an SOI layer; forming a pad stack atop the |
| 7247546 |
Method of forming strained silicon materials with improved thermal conductivity |
July 24, 2007 |
| A method is disclosed for forming a strained Si layer on SiGe, where the SiGe layer has improved thermal conductivity. A first layer of Si or Ge is deposited on a substrate in a first depositing step; a second layer of the other element is deposited on the first layer in a second deposit |
| 7172930 |
Strained silicon-on-insulator by anodization of a buried p+ silicon germanium layer |
February 6, 2007 |
| A cost efficient and manufacturable method of fabricating strained semiconductor-on-insulator (SSOI) substrates is provided that avoids wafer bonding. The method includes growing various epitaxial semiconductor layers on a substrate, wherein at least one of the semiconductor layers i |
| 7169226 |
Defect reduction by oxidation of silicon |
January 30, 2007 |
| A method of fabricating high-quality, substantially relaxed SiGe-on-insulator substrate materials which may be used as a template for strained Si is described. A silicon-on-insulator substrate with a very thin top Si layer is used as a template for compressively strained SiGe growth. |
| 7141457 |
Method to form Si-containing SOI and underlying substrate with different orientations |
November 28, 2006 |
| A method of forming a hybrid SOI substrate comprising an upper Si-containing layer and a lower Si-containing layer, wherein the upper Si-containing layer and the lower Si-containing layer have different crystallographic orientations. In accordance with the present invention, the buri |
| 7141115 |
Method of producing silicon-germanium-on-insulator material using unstrained Ge-containing sourc |
November 28, 2006 |
| A method of fabricating a high-quality relaxed SiGe-on-insulator substrate material is provided in which a prefabricated silicon-on-insulator substrate is first exposed to an unstrained Ge-containing source and then heated (annealed/oxidized) to cause Ge diffusion and thermal mixing of G |
| 7125458 |
Formation of a silicon germanium-on-insulator structure by oxidation of a buried porous silicon |
October 24, 2006 |
| A simple and direct method of forming a SiGe-on-insulator that relies on the oxidation of a porous silicon layer (or region) that is created beneath a Ge-containing layer is provided. The method includes the steps of providing a structure comprising a Si-containing substrate having a |
| 7115463 |
Patterning SOI with silicon mask to create box at different depths |
October 3, 2006 |
| The present invention provides a method of fabricating a patterned silicon-on-insulator substrate which includes dual depth SOI regions or both SOI and non-SOI regions within the same substrate. The method of the present invention includes forming a silicon mask having at least one o |
| 7087965 |
Strained silicon CMOS on hybrid crystal orientations |
August 8, 2006 |
| Methods of forming a strained Si-containing hybrid substrate are provided as well as the strained Si-containing hybrid substrate formed by the methods. In the methods of the present invention, a strained Si layer is formed overlying a regrown semiconductor material, a second semicond |
| 7084460 |
Method for fabricating SiGe-on-insulator (SGOI) and Ge-on-insulator (GOI) substrates |
August 1, 2006 |
| A method for fabricating germanium-on-insulator (GOI) substrate materials, the GOI substrate materials produced by the method and various structures that can include at least the GOI substrate materials of the present invention are provided. The GOI substrate material include at least a |
| 7084050 |
Formation of silicon-germanium-on-insulator (SGOI) by an integral high temperature SIMOX-Ge inte |
August 1, 2006 |
| A method of forming a substantially relaxed, high-quality SiGe-on-insulator substrate material using SIMOX and Ge interdiffusion is provided. The method includes first implanting ions into a Si-containing substrate to form an implanted-ion rich region in the Si-containing substrate. |
| 7075150 |
Ultra-thin Si channel MOSFET using a self-aligned oxygen implant and damascene technique |
July 11, 2006 |
| The present invention provides a thin channel MOSFET having low external resistance. In broad terms, a silicon-on-insulator structure comprising a SOI layer located atop a buried insulating layer, said SOI layer having a channel region which is thinned by the presence of an underlying |
| 7074686 |
Method of creating high-quality relaxed SiGe-on-insulator for strained Si CMOS applications |
July 11, 2006 |
| A method of forming a thin, high-quality relaxed SiGe-on-insulator substrate material is provided which first includes forming a SiGe or pure Ge layer on a surface of a first single crystal Si layer which is present atop a barrier layer that is resistant to the diffusion of Ge. Optio |
| 7067371 |
Silicon-on-insulator (SOI) integrated circuit (IC) chip with the silicon layers consisting of re |
June 27, 2006 |
| The present invention provides SOI material which includes a top Si-containing layer which has regions of different thickness as well as a method of fabricating such SOI material. The inventive method includes a step of thinning predetermined regions of the top Si-containing layer by |
| 7049660 |
High-quality SGOI by oxidation near the alloy melting temperature |
May 23, 2006 |
| A method of forming a low-defect, substantially relaxed SiGe-on-insulator substrate material is provided. The method includes first forming a Ge-containing layer on a surface of a first single crystal Si layer which is present atop a barrier layer that is resistant to Ge diffusion. A |
| 7026249 |
SiGe lattice engineering using a combination of oxidation, thinning and epitaxial regrowth |
April 11, 2006 |
| The present invention provides a method of fabricating a SiGe-on-insulator substrate in which lattice engineering is employed to decouple the interdependence between SiGe thickness, Ge fraction and strain relaxation. The method includes providing a SiGe-on-insulator substrate materia |
| 6991998 |
Ultra-thin, high quality strained silicon-on-insulator formed by elastic strain transfer |
January 31, 2006 |
| A method of forming a semiconductor structure comprising a first strained semiconductor layer over an insulating layer is provided in which the first strained semiconductor layer is relatively thin (less than about 500 .ANG.) and has a low defect density (stacking faults and threading |
| 6989058 |
Use of thin SOI to inhibit relaxation of SiGe layers |
January 24, 2006 |
| High-quality, metastable SiGe alloys are formed on SOI substrates having an SOI layer of about 500 .ANG. or less, the SiGe layers can remain substantially fully strained compared to identical SiGe layers formed on thicker SOI substrates and subsequently annealed and/or oxidized at high |
| 6967376 |
Divot reduction in SIMOX layers |
November 22, 2005 |
| A method of fabricating a silicon-on-insulator (SOI) having a superficial Si-containing layer that has a reduced number of tile and divot defects is provided. The method includes the steps of: implanting oxygen ions into a surface of a Si-containing substrate, the implanted oxygen ions h |
| 6958286 |
Method of preventing surface roughening during hydrogen prebake of SiGe substrates |
October 25, 2005 |
| The invention forms an epitaxial silicon-containing layer on a silicon germanium, patterned strained silicon, or patterned thin silicon-on-insulator surface and avoids creating a rough surface upon which the epitaxial silicon-containing layer is grown. In order to avoid creating the |
| 6946373 |
Relaxed, low-defect SGOI for strained Si CMOS applications |
September 20, 2005 |
| Thermal mixing methods of forming a substantially relaxed and low-defect SGOI substrate material are provided. The methods include a patterning step which is used to form a structure containing at least SiGe islands formed atop a Ge resistant diffusion barrier layer. Patterning of the Si |
| 6888221 |
BICMOS technology on SIMOX wafers |
May 3, 2005 |
| A method and structure for a bipolar transistor comprising a patterned isolation region formed below an upper surface of a semiconductor substrate and a single crystal extrinsic base formed on an upper surface of the isolation region. The single crystal extrinsic base comprises a por |
| 6884667 |
Field effect transistor with stressed channel and method for making same |
April 26, 2005 |
| Field effect transistor with increased charge carrier mobility due to stress in the current channel 22. The stress is in the direction of current flow (longitudinal). In PFET device, the stress is compressive; in NFET devices, the stress is tensile. The stress is created by a compres |
| 6878611 |
Patterned strained silicon for high performance circuits |
April 12, 2005 |
| In the preferred embodiment of this invention a method is described to convert patterned SOI regions into patterned SGOI (silicon-germanium on oxide) by the SiGe/SOI thermal mixing process to further enhance performance of the logic circuit in an embedded DRAM. The SGOI region acts a |
| 6875982 |
Electron microscope magnification standard providing precise calibration in the magnification ra |
April 5, 2005 |
| A method and calibration standard for fabricating on a single substrate a series of crystalline pairs such that the d-spacing difference between the pairs will generate Moire fringes of the correct spacings to optimally calibrate the magnification settings of an electron microscope over |
| 6861158 |
Formation of silicon-germanium-on-insulator (SGOI) by an integral high temperature SIMOX-Ge inte |
March 1, 2005 |
| A method of forming a substantially relaxed, high-quality SiGe-on-insulator substrate material using SIMOX and Ge interdiffusion is provided. The method includes first implanting ions into a Si-containing substrate to form an implanted-ion rich region in the Si-containing substrate. The |
| 6855436 |
Formation of silicon-germanium-on-insulator (SGOI) by an integral high temperature SIMOX-Ge inte |
February 15, 2005 |
| A method of forming a substantially relaxed, high-quality SiGe-on-insulator substrate material using SIMOX and Ge interdiffusion is provided. The method includes first implanting ions into a Si-containing substrate to form an implant rich region in the Si-containing substrate. The implan |
| 6846727 |
Patterned SOI by oxygen implantation and annealing |
January 25, 2005 |
| Methods for forming a patterned SOI region in a Si-containing substrate are provided which has geometries of about 0.25 .mu.m or less. The methods disclose each utilize a patterned dielectric mask that includes at least one opening having a size of about 0.25 .mu.m or less which exposes |
| 6841457 |
Use of hydrogen implantation to improve material properties of silicon-germanium-on-insulator ma |
January 11, 2005 |
| A method of forming a relaxed SiGe-on-insulator substrate having enhanced relaxation, significantly lower defect density and improved surface quality is provided. The method includes forming a SiGe alloy layer on a surface of a first single crystal Si layer. The first single crystal Si |
| 6835983 |
Silicon-on-insulator (SOI) integrated circuit (IC) chip with the silicon layers consisting of re |
December 28, 2004 |
| The present invention provides SOI material which includes a top Si-containing layer which has regions of different thickness as well as a method of fabricating such SOI material. The inventive method includes a step of thinning predetermined regions of the top Si-containing layer by |
| 6825102 |
Method of improving the quality of defective semiconductor material |
November 30, 2004 |
| A method in which a defective semiconductor crystal material is subjected to an amorphization step followed by a thermal treatment step is provided. The amorphization step amorphizes, partially or completely, a region, including the surface region, of a defective semiconductor crystal |
| 6812114 |
Patterned SOI by formation and annihilation of buried oxide regions during processing |
November 2, 2004 |
| A method of fabricating a silicon-on-insulator (SOI) substrate including an ultra-thin top Si-containing layer and at least one patterned buried semi-insulating or insulating region having well defined edges is provided. The method includes a step of implanting first ions into a surf |
| 6805962 |
Method of creating high-quality relaxed SiGe-on-insulator for strained Si CMOS applications |
October 19, 2004 |
| A method of forming a thin, high-quality relaxed SiGe-on-insulator substrate material is provided which first includes forming a SiGe or pure Ge layer on a surface of a first single crystal Si layer which is present atop a barrier layer that is resistant to the diffusion of Ge. Optionall |
| 6803240 |
Method of measuring crystal defects in thin Si/SiGe bilayers |
October 12, 2004 |
| Described herein is a method for delineating crystalline defects in a thin Si layer over a SiGe alloy layer. The method uses a defect etchant with a high-defect selectivity in Si. The Si is etched downed to a thickness that allows the defect pits to reach the underlying SiGe layer. A sec |
| 6800518 |
Formation of patterned silicon-on-insulator (SOI)/silicon-on-nothing (SON) composite structure b |
October 5, 2004 |
| A patterned SOI/SON composite structure and methods of forming the same are provided. In the SOI/SON composite structure, the patterned SOI/SON structures are sandwiched between a Si over-layer and a semiconductor substrate. The method of forming the patterned SOI/SON composite structure |
| 6756639 |
Control of buried oxide quality in low dose SIMOX |
June 29, 2004 |
| A method of fabricating a defect induced buried oxide (DIBOX) region in a semiconductor substrate utilizing an oxygen ion implantation step to create a stable defect region; a low energy implantation step to create an amorphous layer adjacent to the stable defect region, wherein the low |
| 6743651 |
Method of forming a SiGe-on-insulator substrate using separation by implantation of oxygen |
June 1, 2004 |
| A method of fabricating high-quality, substantially relaxed SiGe-on-insulator substrate is provided by implanting oxygen into a Si/SiGe multilayer heterostructure which comprises alternating Si and SiGe layers. Specifically, the high quality, relaxed SiGe-on-insulator is formed by im |
| 6717217 |
Ultimate SIMOX |
April 6, 2004 |
| A method of forming a silicon-on-insulator (SOI) substrate having a buried oxide region that has a greater content of thermally grown oxide as compared to oxide formed by implanted oxygen ions is provided. Specifically, the inventive SOI substrate is formed by utilizing a method wher |
| 6717216 |
SOI based field effect transistor having a compressive film in undercut area under the channel a |
April 6, 2004 |
| Field effect transistor with increased charge carrier mobility due to stress in the current channel 22. The stress is in the direction of current flow (longitudinal). In PFET devices, the stress is compressive; in NFET devices, the stress is tensile. The stress is created by a compre |
| 6657261 |
Ground-plane device with back oxide topography |
December 2, 2003 |
| A ground-plane SOI device including at least a gate region that is formed on a top Si-containing layer of a SOI wafer, said top Si-containing layer being formed on a non-planar buried oxide layer, wherein said non-planar buried oxide layer has a thickness beneath the gate region that is |
