| Patent Number |
Title Of Patent |
Date Issued |
| 7211524 |
Method of forming insulating layer in semiconductor device |
May 1, 2007 |
| The present invention relates to a method of forming an insulating film in a semiconductor device. After a mixed gas of alkyl silane gas and N.sub.2O gas is supplied into the deposition equipment, a radio frequency power including a short pulse wave for causing incomplete reaction upon a |
| 7205242 |
Method for forming isolation layer in semiconductor device |
April 17, 2007 |
| The present invention relates to a method for forming an insulating layer in a semiconductor device. After a first oxide film is formed in a trench, an impurity remaining on the first oxide film in the process of etching the first oxide film using a gas containing fluorine is stripped |
| 7183173 |
Method for forming isolation film in semiconductor device |
February 27, 2007 |
| A method for forming an isolation film of a semiconductor device is disclosed which includes forming trenches in a semiconductor substrate, forming a first HDP oxide film in the formed trenches, performing an etch-back process using a mixing gas of C.sub.2F.sub.6 gas and O.sub.2 gas |
| 7022624 |
Semiconductor device and method of fabricating the same |
April 4, 2006 |
| The present invention is provided to a semiconductor device and a method of fabricating the same. A spacer consisting of SiCxHy or SiOCxHy having a low dielectric constant is formed at the sidewall of a trench or a hole that is formed in an interlayer insulating film. It is therefore pos |
| 6737349 |
Method of forming a copper wiring in a semiconductor device |
May 18, 2004 |
| A method of forming a copper wiring in a semiconductor device. The method can prevent an increase of a dielectric constant of a low dielectric constant film and making bad deposition of a copper anti-diffusion film, due to infiltration of an organic solvent, an etch gas, etc. into the lo |
| 6190233 |
Method and apparatus for improving gap-fill capability using chemical and physical etchbacks |
February 20, 2001 |
| A method and an apparatus for depositing a dielectric layer to fill in a gap between adjacent metal lines. In preferred embodiments of the method, a first dielectric layer is deposited over the lines and subsequently etched using both chemical and physical etchback steps. After the etchb |
| 5990000 |
Method and apparatus for improving gap-fill capability using chemical and physical etchbacks |
November 23, 1999 |
| A method and an apparatus for depositing a dielectric layer to fill in a gap between adjacent metal lines. In preferred embodiments of the method, a first dielectric layer is deposited over the lines and subsequently etched using both chemical and physical etchback steps. After the etchb |
| 5908672 |
Method and apparatus for depositing a planarized passivation layer |
June 1, 1999 |
| A planarized passivation layer is described. A planarized passivation layer of the present invention preferably includes a fluorosilicate glass (FSG) layer and a silicon nitride layer. The FSG layer is preferably deposited using triethoxyfluorosilane (TEFS) and tetraethoxyorthosilicate ( |
