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Nobumichi Okazaki Patents
Inventor:
Okazaki; Nobumichi
Address:
Kanagawa, JP
No. of patents:
10
Patents:




Patent Number Title Of Patent Date Issued
7423902 Storage device and semiconductor apparatus September 9, 2008
A storage device includes memory cells disposed in a matrix. The memory cells each include a storage element whose resistance changes from a higher state to a lower state when an electric signal of a first threshold level or higher is applied and whose resistance changes from the low
7372718 Storage and semiconductor device May 13, 2008
A storage device includes a storage element having characteristics such that the resistance value thereof changes from a high state to a low state as a result of an electrical signal higher than or equal to a first threshold signal being applied and changes from a low state to a high
7345908 Memory device March 18, 2008
The present invention is to provide a memory device including: a plurality of memory cells that each include a memory element having a memory layer and first and second electrodes that sandwich the memory layer, the plurality of memory cells being divided into memory blocks of m columns
7336520 Storage device and semiconductor apparatus February 26, 2008
A storage device includes a storage element having first and second terminals that cause a first electrical characteristic change when an electric signal of a first threshold level or higher is applied and that cause a second electrical characteristic change, which is asymmetrical to
7242606 Storage apparatus and semiconductor apparatus July 10, 2007
A storage apparatus includes memory devices each having a storage element with a characteristic that the application of an electric signal not lower than a first threshold signal allows the storage element to shift from a high resistance value state to a low resistance value state, and
7221600 Arithmetic circuit integrated with a variable resistance memory element May 22, 2007
An arithmetic circuit is provided having a compact and high-speed logic-in-memory wherein various operations are performed. The arithmetic circuit includes a memory element having a variable resistance element R in which the state of resistance changes reversibly between the state of
7209379 Storage device and semiconductor device April 24, 2007
A storage device is proposed, which includes: a source line arranged along a row direction; a bit line arranged along a column direction; a storage element arranged at an intersection of the source line and the bit line; a writing circuit connected to one terminal of the bit line and app
7130224 Composite storage circuit and semiconductor device having the same composite storage circuit October 31, 2006
An object of the present invention is to provide a compound storage circuit that includes a storage circuit including a volatile storage circuit and a nonvolatile storage circuit connected in parallel to each other and that is arranged to be capable of an instant-on function by stori
7020010 Magnetic storage apparatus using ferromagnetic tunnel junction devices March 28, 2006
A magnetic storage apparatus provided using ferromagnetic tunnel junction devices is constituted by forming the ferromagnetic tunnel junction device by laminating a fixed magnetization layer and a free magnetization layer on top and back surfaces of a tunnel barrier layer, respectively,
4827454 Semiconductor memory device May 2, 1989
A semiconductor memory device, which can be maintained free from malfunction despite generation of current noise due to output signal variation in a output buffer circuit, is equipped with a switch in the input stage of the output buffer circuit, and the switch is so controlled as to


 
 
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