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Yasushi Oka Patents |
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Inventor: Oka; Yasushi
Address: Tachikawa, JP
No. of patents: 4
Patents:
| Patent Number |
Title Of Patent |
Date Issued |
| 7388777 |
Semiconductor device |
June 17, 2008 |
| A plurality of nonvolatile memory cells that constitute a nonvolatile memory are disposed in array form. Selection MIS.cndot.FETs for memory cell selection are electrically connected every bits. Each of the nonvolatile memory cells has a MIS.cndot.FET for writing data, a MIS.cndot.FE |
| 7313026 |
Semiconductor device |
December 25, 2007 |
| Provided is a nonvolatile memory with less element deterioration and good data retaining properties. In a nonvolatile memory formed by the manufacturing steps of a complementary type MISFET without adding thereto another additional step, erasing of data is carried out by applying 9V to |
| 6914832 |
Semiconductor memory device with memory cell array divided into blocks |
July 5, 2005 |
| A semiconductor memory device includes a plurality of blocks, each of which includes a memory cell array, and outputs data signals and a redundancy signal. The semiconductor memory device further includes at least one first multiplexer which is coupled to the blocks, and selects one of t |
| 6760271 |
Semiconductor memory device with shorter signal lines |
July 6, 2004 |
| A semiconductor memory device includes a plurality of input/output terminals, a memory cell array which are divided into blocks respectively corresponding to the input/output terminals such that only one of the blocks corresponds to a given one of the input/output terminals, sense am |
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