| Patent Number |
Title Of Patent |
Date Issued |
| 7335947 |
Angled implant for shorter trench emitter |
February 26, 2008 |
| An insulated gate trench type semiconductor device having L-shaped diffused regions, each diffused region having a vertically oriented portion and a horizontally oriented portion extending laterally from the vertically oriented portion, and a method for manufacturing the device in wh |
| 7005702 |
IGBT with amorphous silicon transparent collector |
February 28, 2006 |
| The collector or anode of a non-punch through IGBT formed in a float zone silicon wafer is formed by a P doped amorphous silicon layer deposited on the back surface of an ultra thin wafer. A DMOS structure is formed on the top surface of the wafer before the bottom structure is formed. A |
| 6919248 |
Angled implant for shorter trench emitter |
July 19, 2005 |
| An insulated gate trench type semiconductor device having L-shaped diffused regions, each diffused region having a vertically oriented portion and a horizontally oriented portion extending laterally from the vertically oriented portion, and a method for manufacturing the device in which |
| 6753580 |
Diode with weak anode |
June 22, 2004 |
| A diode is formed having a weak injection shallow, low P concentration anode in an N type wafer or die. The resulting diode has a soft reverse recovery characteristic with low recovery voltage and is particularly useful either as a power factor correction diode or as an antiparallel |
| 6707111 |
Hydrogen implant for buffer zone of punch-through non EPI IGBT |
March 16, 2004 |
| An IGBT is formed in a thin (less than 250 microns thick) float zone silicon wafer using a hydrogen implant to form an N.sup.+ buffer layer at the bottom of the wafer. A weak anode is formed on the bottom of the wafer. A single hydrogen implant, or a plurality of hydrogen implants of |
| 6683331 |
Trench IGBT |
January 27, 2004 |
| An IGBT has parallel spaced trenches lined with gate oxide and filled with conductive polysilicon gate bodies. The trenches extend through a P.sup.- base region which is about 7 microns deep. A deep narrow N.sup.+ emitter diffusion is at the top of the trench and a shallow P.sup.+ contac |
| 6627961 |
Hybrid IGBT and MOSFET for zero current at zero voltage |
September 30, 2003 |
| A high voltage MOSgated semiconductor device has a generally linear MOSFET type forward current versus forward voltage characteristic at low voltage and the high current, low forward drop capability of an IGBT. The device is particularly useful as the control transistor for a television |
| 6603153 |
Fast recovery diode and method for its manufacture |
August 5, 2003 |
| A soft recovery diode is made by first implanting helium into the die to a location below the P/N junction and the implant annealed. An E-beam radiation process then is applied to the entire wafer and is also annealed. The diode then has very soft recovery characteristics without req |
| 6482681 |
Hydrogen implant for buffer zone of punch-through non epi IGBT |
November 19, 2002 |
| An IGBT is formed in a thin (less than 250 microns thick) float zone silicon wafer using a hydrogen implant to form an N.sup.+ buffer layer at the bottom of the wafer. A weak anode is formed on the bottom of the wafer. A single hydrogen implant, or a plurality of hydrogen implants of |
| 6426248 |
Process for forming power MOSFET device in float zone, non-epitaxial silicon |
July 30, 2002 |
| A vertical conduction MOSFET semiconductor device is formed in a non-epitaxial (float zone) lightly doped silicon substrate. Device junction regions are formed in the top surface of the lightly doped float zone substrate. The backside of the wafer is then ground by surface grinding t |
| 6261874 |
Fast recovery diode and method for its manufacture |
July 17, 2001 |
| A soft recovery diode is made by first implanting helium into the die to a location below the P/N junction and the implant annealed. An E-beam radiation process then is applied to the entire wafer and is also annealed. The diode then has very soft recovery characteristics without req |
| 6242288 |
Anneal-free process for forming weak collector |
June 5, 2001 |
| The collector (anode) of a non punch through IGBT formed in a float zone silicon monocrystaline wafer is formed with a DMOS top structure and is thereafter ground at its bottom surface to a less than 250 micron thickness. A shallow P type implant is then made in the bottom surface and |
| 6197649 |
Process for manufacturing planar fast recovery diode using reduced number of masking steps |
March 6, 2001 |
| A fast recovery diode (FRED) is fabricated by a process using a reduced number of masking steps. The FRED is a vertical conduction device in which P type anode regions are isolated using either LOCOS oxidation or deposited low temperature oxide. The first masking step defines the anode |
| 5766966 |
Power transistor device having ultra deep increased concentration region |
June 16, 1998 |
| A cellular insulated gate bipolar transistor ("IGBT") device employs increased concentration in the active region between spaced bases to a depth greater than the depth of the base regions. The implant dose which is the source of the increased concentration is about 3.5.times.10.sup.12 |
