| Patent Number |
Title Of Patent |
Date Issued |
| 6930446 |
Method for improving current stability of field emission displays |
August 16, 2005 |
| A method is provided for manufacturing a field emission device, the method including operating the field emission device in a pressure of at most about 10.sup.-8 Torr for a selected period of time to evacuate outgassed materials and sealing the field emission device. |
| 6831403 |
Field emission display cathode assembly |
December 14, 2004 |
| Improved field emission display includes a buffer layer of copper, aluminum, silicon nitride or doped or undoped amorphous, poly, or microcrystalline silicon located between a chromium gate electrode and associated dielectric layer in a cathode assembly. The buffer layer substantiall |
| 6791113 |
Capacitor constructions comprising a nitrogen-containing layer over a rugged polysilicon layer |
September 14, 2004 |
| The invention encompasses a method of forming a dielectric material. A nitrogen-comprising layer is formed on at least some of the surface of a rugged polysilicon substrate to form a first portion of a dielectric material. After the nitrogen-comprising layer is formed, at least some of |
| 6692323 |
Structure and method to enhance field emission in field emitter device |
February 17, 2004 |
| A structure and method are provided to inhibit degradation to the electron beam of a field emitter device by coating the field emitter tip with a substance or a compound. The substance or compound acts in the presence of outgassing to inhibit such degradation. In one embodiment, the subs |
| 6607965 |
Methods of forming capacitors |
August 19, 2003 |
| The invention encompasses a method of forming a dielectric material. A nitrogen-comprising layer is formed on at least some of the surface of a rugged polysilicon substrate to form a first portion of a dielectric material. After the nitrogen-comprising layer is formed, at least some of |
| 6583441 |
Capacitor constructions comprising a nitrogen-containing layer over a rugged polysilicon layer |
June 24, 2003 |
| The invention encompasses a method of forming a dielectric material. A nitrogen-comprising layer is formed on at least some of the surface of a rugged polysilicon substrate to form a first portion of a dielectric material. After the nitrogen-comprising layer is formed, at least some of |
| 6562684 |
Methods of forming dielectric materials |
May 13, 2003 |
| The invention encompasses a method of forming a dielectric material. A nitrogen-comprising layer is formed on at least some of the surface of a rugged polysilicon substrate to form a first portion of a dielectric material. After the nitrogen-comprising layer is formed, at least some of |
| 6518699 |
Field emission display having reduced optical sensitivity and method |
February 11, 2003 |
| An emitter substructure and methods for manufacturing the substructure are described. A substrate has a p-region formed at a surface of the substrate. A n-tank is formed such that the p-region surrounds a periphery of the n-tank. An emitter is formed on and electrically coupled to the |
| 6515414 |
Low work function emitters and method for production of fed's |
February 4, 2003 |
| According to one aspect of the invention, a field emission display is provided comprising: an anode; a phosphor screen located on the anode; a cathode; an evacuated space between the anode and the cathode; an emitter located on the cathode opposite the phosphor; wherein the emitter c |
| 6509686 |
Field emission display cathode assembly with gate buffer layer |
January 21, 2003 |
| Improved field emission display includes a buffer layer of copper, aluminum, silicon nitride or doped or undoped amorphous, poly, or microcrystalline silicon located between a chromium gate electrode and associated dielectric layer in a cathode assembly. The buffer layer substantiall |
| 6507329 |
Light-insensitive resistor for current-limiting of field emission displays |
January 14, 2003 |
| A semiconductor device for use in field emission displays includes a substrate formed from a semiconductor material, glass, soda lime, or plastic. A first layer of a conductive material is formed on the substrate. A second layer of microcrystalline silicon is formed on the first laye |
| 6471561 |
Titanium silicide nitride emitters and method |
October 29, 2002 |
| A field emission display apparatus includes a plurality of emitters formed on a substrate. Each of the emitters includes a titanium silicide nitride outer layer so that the emitters are less susceptible to degradation. A dielectric layer is formed on the substrate and the emitters, and a |
| 6436788 |
Field emission display having reduced optical sensitivity and method |
August 20, 2002 |
| An emitter substructure and methods for manufacturing the substructure are described. A substrate has a p-region formed at a surface of the substrate. A n-tank is formed such that the p-region surrounds a periphery of the n-tank. An emitter is formed on and electrically coupled to the |
| 6417617 |
Titanium silicide nitride emitters and method |
July 9, 2002 |
| A field emission display apparatus includes a plurality of emitters formed on a substrate. Each of the emitters includes a titanium silicide nitride outer layer so that the emitters are less susceptible to degradation. A dielectric layer is formed on the substrate and the emitters, and a |
| 6362038 |
Low and high voltage CMOS devices and process for fabricating same |
March 26, 2002 |
| CMOS devices and process for fabricating low voltage, high voltage, or both low voltage and high voltage CMOS devices are disclosed. According to the process, p-channel stops and source/drain regions of PMOS devices are implanted into a substrate in a single step. Further, gates for both |
| 6361392 |
Extraction grid for field emission displays and method |
March 26, 2002 |
| A display apparatus includes a substrate and a plurality of emitters formed on the substrate. The apparatus also includes a dielectric layer formed on the substrate. The dielectric layer includes a plurality of openings each formed about one of the plurality of emitters. The dielectric l |
| 6353285 |
Field emission display having reduced optical sensitivity and method |
March 5, 2002 |
| An emitter substructure and methods for manufacturing the substructure are described. A substrate has a p-region formed at a surface of the substrate. A n-tank is formed such that the p-region surrounds a periphery of the n-tank. An emitter is formed on and electrically coupled to the |
| 6323587 |
Titanium silicide nitride emitters and method |
November 27, 2001 |
| A field emission display apparatus includes a plurality of emitters formed on a substrate. Each of the emitters includes a titanium silicide nitride outer layer so that the emitters are less susceptible to degradation. A dielectric layer is formed on the substrate and the emitters, and a |
| 6278229 |
Field emission displays having a light-blocking layer in the extraction grid |
August 21, 2001 |
| A display apparatus includes a substrate and a plurality of emitters formed on the substrate. The apparatus also includes a dielectric layer formed on the substrate. The dielectric layer includes a plurality of openings each formed about one of the plurality of emitters. The dielectric l |
| 6271632 |
Field emission display having reduced optical sensitivity and method |
August 7, 2001 |
| An emitter substructure and methods for manufacturing the substructure are described. A substrate has a p-region formed at a surface of the substrate. A n-tank is formed such that the p-region surrounds a periphery of the n-tank. An emitter is formed on and electrically coupled to the |
| 6228667 |
Field emission displays with reduced light leakage |
May 8, 2001 |
| Semiconductor devices may be made by forming a silicided layer on a silicon material such as that used to form the extractor of a field emission display. The silicided layer may be self-aligned with the emitter of a field emission display. It the silicided layer is treated at a temperatu |
| 6181308 |
Light-insensitive resistor for current-limiting of field emission displays |
January 30, 2001 |
| A semiconductor device for use in field emission displays includes a substrate formed from a semiconductor material, glass, soda lime, or plastic. A first layer of a conductive material is formed on the substrate. A second layer of microcrystalline silicon is formed on the first laye |
| 6133056 |
Field emission displays with reduced light leakage |
October 17, 2000 |
| Semiconductor devices may be made by forming a silicided layer on a silicon material such as that used to form the extractor of a field emission display. The silicided layer may be self-aligned with the emitter of a field emission display. If the silicided layer is treated at a temperatu |
| 6096589 |
Low and high voltage CMOS devices and process for fabricating same |
August 1, 2000 |
| CMOS devices and process for fabricating low voltage, high voltage, or both low voltage and high voltage CMOS devices are disclosed. According to the process, p-channel stops and source/drain regions of PMOS devices are implanted into a substrate in a single step. Further, gates for both |
| 6064075 |
Field emission displays with reduced light leakage having an extractor covered with a silicide n |
May 16, 2000 |
| Semiconductor devices may be made by forming a silicided layer on a silicon material such as that used to form the extractor of a field emission display. The silicided layer may be self-aligned with the emitter of a field emission display. If the silicided layer is treated at a temperatu |
| 6057638 |
Low work function emitters and method for production of FED's |
May 2, 2000 |
| According to one aspect of the invention, a field emission display is provided comprising: an anode; a phosphor screen located on the anode; a cathode; an evacuated space between the anode and the cathode; an emitter located on the cathode opposite the phosphor; wherein the emitter c |
| 6028322 |
Double field oxide in field emission display and method |
February 22, 2000 |
| A field emission display includes a substrate, a plurality of emitters formed on the substrate, a semiconductor device formed in or on the substrate for controlling the flow of electrons to the emitters and a dielectric layer formed on the substrate. An extraction grid is formed on t |
| 6024620 |
Field emission displays with reduced light leakage |
February 15, 2000 |
| Semiconductor devices may be made by forming a silicided layer on a silicon material such as that used to form the extractor of a field emission display. The silicided layer may be self-aligned with the emitter of a field emission display. If the silicided layer is treated at a temperatu |
| 6015323 |
Field emission display cathode assembly government rights |
January 18, 2000 |
| Improved field emission display includes a buffer layer of copper, aluminum, silicon nitride or doped or undoped amorphous, poly, or microcrystalline silicon located between a chromium gate electrode and associated dielectric layer in a cathode assembly. The buffer layer substantiall |
| 5956611 |
Field emission displays with reduced light leakage |
September 21, 1999 |
| Semiconductor devices may be made by forming a silicided layer on a silicon material such as that used to form the extractor of a field emission display. The silicided layer may be self-aligned with the emitter of a field emission display. If the silicided layer is treated at a temperatu |
| 5880502 |
Low and high voltage CMOS devices and process for fabricating same |
March 9, 1999 |
| CMOS devices and process for fabricating low voltage, high voltage, or both low voltage and high voltage CMOS devices are disclosed. According to the process, p-channel stops and source/drain regions of PMOS devices are implanted into a substrate in a single step. Further, gates for both |
| 5772488 |
Method of forming a doped field emitter array |
June 30, 1998 |
| According to one aspect of the invention, a field emission display is provided comprising: an anode; a phosphor screen located on the anode; a cathode; an evacuated space between the anode and the cathode; an emitter located on the cathode opposite the phosphor; wherein the emitter c |
| 5656886 |
Technique to improve uniformity of large area field emission displays |
August 12, 1997 |
| Cold cathode passive matrix FEDs are fabricated by depositing a resistive layer on a substrate, and coated with a protective layer in which at least one hole is formed. Cathode material is deposited on the protective layer making direct contact with the resistive layer through the hole t |
