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Ta-Chung Ma Patents
Inventor:
Ma; Ta-Chung
Address:
San Jose, CA
No. of patents:
1
Patents:




Patent Number Title Of Patent Date Issued
7099231 Interleaving memory blocks to relieve timing bottleneck in a multi-queue first-in first-out memo August 29, 2006
A multi-queue memory system includes first and second memory blocks. The first memory block includes a first array of memory cells, a first sense amplifier circuit and a second sense amplifier circuit. The second memory block includes a second array of memory cells, a third sense amplifi


 
 
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