| Patent Number |
Title Of Patent |
Date Issued |
| 7208328 |
Method and system for analyzing defects of an integrated circuit wafer |
April 24, 2007 |
| Method and apparatus for efficiently analyzing visual defects of an integrated circuit wafer in the manufacturing process thereof by utilizing an asymmetric visual defect review methodology that can effectively extract high yield-killing defects out of numerous reported defects withi |
| 6773933 |
Method of boosting wafer cleaning efficiency and increasing process yield |
August 10, 2004 |
| A method of boosting wafer-cleaning efficiency and increasing process yield. Different types of process particles are deposited on a test wafer. The test wafer is cleaned in a cleaning operation. The test wafer is scanned to determine the types of process particles that are completely |
| 6706612 |
Fabrication method for shallow trench isolation |
March 16, 2004 |
| A method for fabricating a shallow trench isolation structure includes forming a hard mask layer over a substrate. An ion bombardment step is further performed on the surface of the hard mask layer, followed by forming a patterned photoresist layer on the surface of the hard mask lay |
