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Yung-Cheng Lu Patents
Inventor:
Lu; Yung-Cheng
Address:
Taipei, TW
No. of patents:
39
Patents:




Patent Number Title Of Patent Date Issued
7405481 Glue layer for adhesion improvement between conductive line and etch stop layer in an integrated July 29, 2008
In an integrated circuit chip, a conductive line is formed in a first IMD layer. The conductive line is formed of a conductive line material that tends to form an oxide when exposed to an oxygen-containing substance. A glue layer is formed on the conductive line. The glue layer is formed
7312531 Semiconductor device and fabrication method thereof December 25, 2007
Semiconductor devices and methods for fabricating the same. The devices include a substrate, a catalyst layer, a second dielectric layer, and carbon nanotubes (CNTs). The substrate comprises an overlying first dielectric layer with an electrode embedded therein. The catalyst layer ov
7259090 Copper damascene integration scheme for improved barrier layers August 21, 2007
A metal filled dual damascene structure with a reduced capacitance contribution and method for forming the same, the method including forming a first metal filled damascene lined with a first metal barrier layer thickness in a first dielectric insulating layer; and, forming a second
7256124 Method of fabricating semiconductor device August 14, 2007
A method of fabricating a semiconductor device. A semiconductor substrate with a patterned conductive layer on a top surface of the substrate is first provided. A dielectric layer is then formed to cover the substrate. Thereafter, an electron beam irradiation procedure is performed to an
7253524 Copper interconnects August 7, 2007
A semiconductor substrate has a first copper layer, on which an etch stop layer and a dielectric layer are successively formed. A second copper layer penetrates the dielectric layer and the etch stop layer to electrically connect to the first metal layer. The etch stop layer has a di
7250364 Semiconductor devices with composite etch stop layers and methods of fabrication thereof July 31, 2007
Semiconductor devices with composite etch stop layers and methods of fabrication thereof. An semiconductor device with a composite etch stop layer includes a substrate having a conductive member, a first etch stop layer on the substrate and the conductive member, a second etch stop l
7247571 Method for planarizing semiconductor structures July 24, 2007
A method for planarizing a semiconductor structure is disclosed. A semiconductor substrate having a first area in which one or more trenches are formed in a first pattern density, and a second area in which one or more trenches are formed in a second pattern density lower than the first
7244673 Integration film scheme for copper / low-k interconnect July 17, 2007
A structure for a multi-level interconnect inter-level dielectric layer (ILD), a method of manufacturing thereof, and a semiconductor device including the ILD layer. The ILD layer includes a first low-dielectric constant material sub-layer, and a second low-dielectric constant materi
7220677 WAT process to avoid wiring defects May 22, 2007
A method for forming a multi-level semiconductor device to eliminate conductive interconnect protrusions following a WAT test, the method including forming a first metallization layer; carrying out a wafer acceptance testing (WAT) process; and, then carrying out a chemical mechanical
7217648 Post-ESL porogen burn-out for copper ELK integration May 15, 2007
A method of manufacturing a semiconductor device having a porous, low-k dielectric layer is provided. A preferred embodiment comprises the steps of forming a porogen-containing, low-k dielectric layer, in the damascene process. In preferred embodiments, pore generation, by e-beam porogen
7160821 Method of depositing low k films January 9, 2007
A silicon oxide layer is produced by plasma enhanced decomposition of an organosilicon compound to deposit films having a carbon content of at least 1% by atomic weight. An optional carrier gas may be introduced to facilitate the deposition process at a flow rate less than or equal to
7129164 Method for forming a multi-layer low-K dual damascene October 31, 2006
A damascene structure and method for forming the same in a multi-density dielectric insulating layer the method including providing a substrate; forming at least a first layer comprising silicon oxide according to a first process having a first density; forming at least a second layer
7094683 Dual damascene method for ultra low K dielectrics August 22, 2006
A method for forming a dual damascene opening to protect a low-K dielectric insulating layer including providing a semiconductor process wafer comprising a via opening extending though a thickness portion of at least one dielectric insulating layer; depositing a first dielectric laye
7074727 Process for improving dielectric properties in low-k organosilicate dielectric material July 11, 2006
Low-k organosilicate dielectric material can be exposed to a series of reagents, including a halogenation reagent, an alkylation reagent, and a termination reagent, in order to reverse degradation of dielectric properties caused by previous processing steps.
7074708 Method of decreasing the k value in sioc layer deposited by chemical vapor deposition July 11, 2006
A method for processing a substrate including depositing a dielectric layer containing silicon, oxygen, and carbon on the substrate by chemical vapor deposition, wherein the dielectric layer has a carbon content of at least 1% by atomic weight and a dielectric constant of less than about
7071093 Integrated treatment method for obtaining robust low dielectric constant materials July 4, 2006
An integrated method comprises providing a low dielectric material, applying a first treatment altering a first property of the low dielectric material, and applying a second treatment altering a second property of the treated low dielectric material and producing a lower dielectric
7056826 Method of forming copper interconnects June 6, 2006
A method of forming copper interconnects for an integrated circuit is provided. An antireflective coating layer is formed over an insulating layer formed over a semiconductor substrate. An interconnect pattern is patterned and etched into said insulating layer. A diffusion barrier la
6958524 Insulating layer having graded densification October 25, 2005
A method of manufacturing an insulating layer, including forming a first dielectric layer having a first pore size over a substrate, shrinking the first pore size to a second pore size by a first densification process, forming a second dielectric layer over the first dielectric layer, an
6930061 Plasma processes for depositing low dielectric constant films August 16, 2005
A method and apparatus for depositing a low dielectric constant film by reaction of an organosilicon compound and an oxidizing gas at a constant RF power level from about 10 W to about 200 W or a pulsed RF power level from about 20 W to about 500 W. Dissociation of the oxidizing gas can
6869896 Plasma processes for depositing low dielectric constant films March 22, 2005
A method and apparatus for depositing a low dielectric constant film by reaction of an organosilicon compound and an oxidizing gas comprising carbon at a constant RF power level. Dissociation of the oxidizing gas can be increased prior to mixing with the organosilicon compound, preferabl
6806207 Method of depositing low K films October 19, 2004
A silicon oxide layer is produced by plasma enhanced decomposition of an organosilicon compound to deposit films having a carbon content of at least 1% by atomic weight. An optional carrier gas may be introduced to facilitate the deposition process at a flow rate less than or equal to th
6784119 Method of decreasing the K value in SIOC layer deposited by chemical vapor deposition August 31, 2004
A method for processing a substrate comprising depositing a dielectric layer comprising silicon, oxygen, and carbon on the substrate by chemical vapor deposition, wherein the dielectric layer has a carbon content of at least 1% by atomic weight and a dielectric constant of less than abou
6756321 Method for forming a capping layer over a low-k dielectric with improved adhesion and reduced di June 29, 2004
A method for forming a capping layer for improved adhesion with an underlying insulating layer in a multiple layer semiconductor device manufacturing process including providing a semiconductor wafer including a process surface comprising a dielectric insulating layer; and, providing
6753607 Structure for improving interlevel conductor connections June 22, 2004
The present invention relates to an improved integrated circuit structure including adjacent conductive and dielectric layers having a continuous, planar top surface, produced by a process which includes treating the surface with a silane compound, followed by depositing an etch stop lay
6743737 Method of improving moisture resistance of low dielectric constant films June 1, 2004
A method and apparatus for depositing a low dielectric constant film includes depositing a silicon oxide based film, preferably by reaction of an organosilicon compound and an oxidizing gas at a low RF power level from about 10 W to about 500 W, exposing the silicon oxide based film to
6734115 Plasma processes for depositing low dielectric constant films May 11, 2004
A method and apparatus for depositing a low dielectric constant film by reaction of an organosilicon compound and an oxidizing gas comprising carbon at a constant RF power level. Dissociation of the oxidizing gas can be increased prior to mixing with the organosilicon compound, preferabl
6660656 Plasma processes for depositing low dielectric constant films December 9, 2003
A method and apparatus for depositing a low dielectric constant film by reaction of an organosilicon compound and an oxidizing gas at a constant RF power level from about 10W to about 200W or a pulsed RF power level from about 20W to about 500W. Dissociation of the oxidizing gas can be
6632735 Method of depositing low dielectric constant carbon doped silicon oxide October 14, 2003
A method of forming a carbon-doped silicon oxide layer is disclosed. The carbon-doped silicon oxide layer is formed by applying an electric field to a gas mixture comprising an organosilane compound and an oxidizing gas. The carbon-doped silicon oxide layer is compatible with integrated
6627532 Method of decreasing the K value in SiOC layer deposited by chemical vapor deposition September 30, 2003
A method for processing a substrate comprising depositing a dielectric layer comprising silicon, oxygen, and carbon on the substrate by chemical vapor deposition, wherein the dielectric layer has a carbon content of at least 1% by atomic weight and a dielectric constant of less than abou
6602780 Method for protecting sidewalls of etched openings to prevent via poisoning August 5, 2003
A method for forming a protective oxide liner to reduce a surface reflectance including providing a hydrophilic insulating layer over a conductive layer; providing an anti-reflectance coating (ARC) layer over the hydrophilic insulating layer; providing an etching stop layer over the
6602779 Method for forming low dielectric constant damascene structure while employing carbon doped sili August 5, 2003
Within a damascene method for forming a patterned conductor layer having formed interposed between its patterns a dielectric layer formed of a comparatively low dielectric constant dielectric material method, there is employed a hard mask layer formed upon the dielectric layer. The hard
6596655 Plasma processes for depositing low dielectric constant films July 22, 2003
A method and apparatus for depositing a low dielectric constant film by reaction of an organosilicon compound and an oxidizing gas at a constant RF power level from about 10W to about 200W or a pulsed RF power level from about 20W to about 500W. Dissociation of the oxidizing gas can be
6593247 Method of depositing low k films using an oxidizing plasma July 15, 2003
A silicon oxide layer is produced by plasma enhanced oxidation of an organosilicon compound to deposit films having a carbon content of at least 1% by atomic weight. Films having low moisture content and resistance to cracking are deposited by introducing oxygen into the processing c
6562690 Plasma processes for depositing low dielectric constant films May 13, 2003
A method and apparatus for depositing a low dielectric constant film by reaction of an organosilicon compound and an oxidizing gas at a constant RF power level from about 10W to about 200W or a pulsed RF power level from about 20W to about 500W. Dissociation of the oxidizing gas can be
6541282 Plasma processes for depositing low dielectric constant films April 1, 2003
A method and apparatus for depositing a low dielectric constant film by reaction of an organosilicon compound and an oxidizing gas at a constant RF power level from about 10 W to about 200 W or a pulsed RF power level from about 20 W to about 500 W. Dissociation of the oxidizing gas can
6448187 Method of improving moisture resistance of low dielectric constant films September 10, 2002
A method and apparatus for depositing a low dielectric constant film includes depositing a silicon oxide based film, preferably by reaction of an organosilicon compound and an oxidizing gas at a low RF power level from about 10W to about 500W, exposing the silicon oxide based film to
6348725 Plasma processes for depositing low dielectric constant films February 19, 2002
A method and apparatus for depositing a low dielectric constant film by reaction of an organosilicon compound and an oxidizing gas at a constant RF power level from about 10 W to about 200 W or a pulsed RF power level from about 20 W to about 500 W. Dissociation of the oxidizing gas can
6303523 Plasma processes for depositing low dielectric constant films October 16, 2001
A method and apparatus for depositing a low dielectric constant film by reaction of an organosilicon compound and an oxidizing gas at a constant RF power level from about 10 W to about 200 W or a pulsed RF power level from about 20 W to about 500 W. Dissociation of the oxidizing gas can
6245690 Method of improving moisture resistance of low dielectric constant films June 12, 2001
A method and apparatus for depositing a low dielectric constant film includes depositing a silicon oxide based film, preferably by reaction of an organosilicon compound and an oxidizing gas at a low RF power level from about 10 W to about 500 W, exposing the silicon oxide based film to


 
 
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