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Shih-Jane Lin Patents
Inventor:
Lin; Shih-Jane
Address:
Hsin-Chu, TW
No. of patents:
10
Patents:




Patent Number Title Of Patent Date Issued
7183598 Colors only process to reduce package yield loss February 27, 2007
Disclosed is an ordered microelectronic fabrication sequence in which color filters are formed by conformal deposition directly onto a photodetector array of a CCD, CID, or CMOS imaging device to create a concave-up pixel surface, and, overlayed with a high transmittance planarizing
6956292 Bumping process to increase bump height and to create a more robust bump structure October 18, 2005
A new process is provided which is an extension and improvement of present processing for the creation of a solder bump. After the layers of Under Bump Metal and a layer of solder metal have been created in patterned and etched format and overlying the contact pad, following a convention
6876049 Colors only process to reduce package yield loss April 5, 2005
Disclosed is an ordered microelectronic fabrication sequence in which color filters are formed by conformal deposition directly onto a photodetector array of a CCD, CID, or CMOS imaging device to create a concave-up pixel surface, and, overlayed with a high transmittance planarizing film
6649507 Dual layer photoresist method for fabricating a mushroom bumping plating structure November 18, 2003
A method of forming a bump structure, comprising the following steps. A structure having an exposed first conductive structure is provided. A first photoresist layer is formed over the structure and the exposed first conductive structure. A second capping photoresist layer is formed over
6632700 Method to form a color image sensor cell while protecting the bonding pad structure from damage October 14, 2003
A new method to form color image sensor cells without damaging bonding pads in the manufacture of an integrated circuit device is achieved. The method comprises, first, forming cell electrodes and bonding pads on a semiconductor substrate. A passivation layer is formed overlying the cell
6605524 Bumping process to increase bump height and to create a more robust bump structure August 12, 2003
A new process is provided which is an extension and improvement of present processing for the creation of a solder bump. After the layers of Under Bump Metal and a layer of solder metal have been created in patterned and etched format and overlying the contact pad, following a convention
6583039 Method of forming a bump on a copper pad June 24, 2003
A method of forming a bump overlying the copper based contact pad to prevent oxidation of the copper based contact pad. A passivation blanket is deposited over a semiconductor device having a copper based contact pad, the passivation blanket includes a first layer overlying the top s
6482669 Colors only process to reduce package yield loss November 19, 2002
Disclosed is an ordered microelectronic fabrication sequence in which color filters are formed by conformal deposition directly onto a photodetector array of a CCD, CID, or CMOS imaging device to create a concave-up pixel surface, and, overlayed with a high transmittance planarizing film
6426283 Method for bumping and backlapping a semiconductor wafer July 30, 2002
A method for bumping and backlapping a semiconductor wafer that has a multiplicity of solder bumps formed on an active surface of the wafer is disclosed. In the method, a preprocessed wafer that has a multiplicity of bond pads formed on a top surface is first provided, a under-bump-m
6372545 Method for under bump metal patterning of bumping process April 16, 2002
A method for forming an under bump metal, comprising the following steps. A semiconductor structure is provided having an exposed I/O pad. A patterned passivation layer is formed over the semiconductor structure, the patterned passivation layer having an opening exposing a first portion


 
 
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