| Patent Number |
Title Of Patent |
Date Issued |
| 6773956 |
Method for contact-connecting a semiconductor component |
August 10, 2004 |
| A solder metal made of a eutectic or stoichiometric composition including at least two metallic or semiconducting elements is applied to a contact (of the semiconductor component, brought into contact with the metal layer of a metallized film and alloyed by heating into the metal layer o |
| 6268659 |
Semiconductor body with layer of solder material comprising chromium |
July 31, 2001 |
| A semiconductor body with a layer of solder material and a method for soldering the semiconductor body include a chromium layer applied to a rear side of the semiconductor body, and a tin layer applied to the chromium layer. The semiconductor is subsequently soldered directly to the |
| 5901901 |
Semiconductor assembly with solder material layer and method for soldering the semiconductor ass |
May 11, 1999 |
| In a semiconductor assembly with a solder material layer and a method for soldering the semiconductor assembly, a silicon semiconductor body with a diffusion barrier layer is provided with a solder material layer, preferably a tin layer. The semiconductor body is then applied to a metal |
| 5610531 |
Testing method for semiconductor circuit levels |
March 11, 1997 |
| A function test is implemented for an individual circuit level (1) that is provided for vertical integration in a semiconductor component. Stacks of circuit levels respectively provided over or under this circuit level in the finished component are simulated as test heads (2, 3). These t |
| 5474651 |
Method for filling via holes in a semiconductor layer structure |
December 12, 1995 |
| For filling via holes that extend onto interconnects to be contacted in a semiconductor layer structure, the interconnects are connected to a conductive layer through auxiliary via holes. The via holes are filled with metal by electro-deposition, whereby the interconnects are wired as a |
| 5419806 |
Method for manufacturing a three-dimensional circuit apparatus |
May 30, 1995 |
| A method for producing a three-dimensional circuit apparatus, wherein substrates that are arranged above one another are firmly joined to one another by depressions in the adjoining surfaces of the neighboring substrates. The depressions are filled with a mixture of two metal constit |
| 4980316 |
Method for producing a resist structure on a semiconductor |
December 25, 1990 |
| A method for producing a resist structure on a semiconductor material which has an opening tapering towards the semiconductor material is provided. This method can be used, for example, for the manufacturing of T-gate metallizations in a field effect transistor. In this method, a thin, u |
| 4950377 |
Apparatus and method for reactive ion etching |
August 21, 1990 |
| The apparatus includes a means for generating a magnetic field at a first electrode to which a high frequency voltage is applied and includes a generator for generating a rectangular low frequency voltage that is capacitively coupled to a second electrode which carries the substrate to |
