A method for controlling a critical dimension in an etched structure comprises the steps of: forming a hard mask above a substrate, measuring a critical dimension of the hard mask, and using the measured hard mask critical dimension to control a critical dimension trim operation perf
The fabrication an NMOS device featuring a shallow source/drain region, performed as part of an integrated process sequence employed to integrate the fabrication of other type devices with the fabrication of the NMOS device, has been developed. A critical feature of the integrated proces
A method for reducing the loss of silicon in a plasma assisted photoresist etching process including providing a silicon substrate including a polysilicon gate structure; masking a portion of the silicon substrate with photoresist to carry out an ion implantation process for forming
