| Patent Number |
Title Of Patent |
Date Issued |
| 7157377 |
Method of making a semiconductor device using treated photoresist |
January 2, 2007 |
| A semiconductor device is made by patterning a conductive layer for forming gates of transistors. The process for forming the gates has a step of patterning photoresist that overlies the conductive layer. The patterned photoresist is trimmed so that its width is reduced. Fluorine, pr |
| 7074713 |
Plasma enhanced nitride layer |
July 11, 2006 |
| An etch stop layer located over a plasma enhanced nitride (PEN) layer. Interlayer dielectric material is then formed over the etched stop layer. The etch stop layer is used as an etch stop for etching openings in the interlayer dielectric. In some embodiments, integrated circuits built |
| 6686633 |
Semiconductor device, memory cell, and processes for forming them |
February 3, 2004 |
| A semiconductor device includes a memory array of static-random-access memory cells. The SRAM cells are formed using a process flow more closely associated with logic-type devices. The SRAM cells are formed using one semiconductor layer compared to at least three typically seen with SRAM |
| 6287951 |
Process for forming a combination hardmask and antireflective layer |
September 11, 2001 |
| A hardmask layer (34) is formed over insulating layers (26, 24, 22 and 20), and an antireflective layer (36) is formed overlying the hardmask layer (34). A resist layer (38) is formed overlying the antireflective layer (36), and an opening is formed in the resist layer to expose a surfac |
| 6284633 |
Method for forming a tensile plasma enhanced nitride capping layer over a gate electrode |
September 4, 2001 |
| A tPEN layer (108) having a tensile stress is formed over a conductive gate stack (104-106) provided on a semiconductor substrate. Following the formation of the conductive gate stack (104-106), an anneal is performed. The conductive gate stack includes a metal layer to prevent outgassin |
| 6218733 |
Semiconductor device having a titanium-aluminum compound |
April 17, 2001 |
| The present invention includes a process for forming an intermetallic layer and a device formed by the process. The process includes a reaction step where a metal-containing layer reacts with a metal-containing gas, wherein the metals of the layer and gas are different. In one embodiment |
| 6184073 |
Process for forming a semiconductor device having an interconnect or conductive film electricall |
February 6, 2001 |
| A semiconductor device includes a memory array of static-random-access memory cells. The SRAM cells are formed using a process flow more closely associated with logic-type devices. The SRAM cells are formed using one semiconductor layer compared to at least three typically seen with SRAM |
| 6174810 |
Copper interconnect structure and method of formation |
January 16, 2001 |
| In one embodiment, a copper interconnect structure is formed by depositing a dielectric layer (28) on a semiconductor substrate (10). The dielectric layer (28) is then patterned to form interconnect openings (29). A layer of copper (34) is then formed within the interconnect openings (29 |
| 6054377 |
Method for forming an inlaid via in a semiconductor device |
April 25, 2000 |
| A inlaid interconnect is formed in a semiconductor device (30). A first interlayer dielectric (ILD) 40 is deposited and etched to form a via opening (44). An etchstop layer (42) is deposited on ILD (40). A second ILD (45) is deposited on etchstop layer (42) in a manner so that a pinc |
| 5918147 |
Process for forming a semiconductor device with an antireflective layer |
June 29, 1999 |
| Antireflective layers (54, 86, and 109) have been developed that have discrete portions (541, 542, 861, 862, 863, 1091, and 1092). The discrete portions (541, 542, 861, 862, 863, 1091, and 1092) allow the antireflective layers (54, 86, and 109) to be used in many instances where usin |
| 5447887 |
Method for capping copper in semiconductor devices |
September 5, 1995 |
| A silicon nitride layer (34) has improved adhesion to underlying copper interconnect members (30) through the incorporation of an intervening copper silicide layer (32). Layer (32) is formed in-situ with a plasma enhanced chemical vapor deposition (PECVD) process for depositing silicon |
| 5358901 |
Process for forming an intermetallic layer |
October 25, 1994 |
| The present invention includes a process for forming an intermetallic layer and a device formed by the process. The process includes a reaction step where a metal-containing layer reacts with a metal-containing gas, wherein the metals of the layer and gas are different. In one embodiment |
| 5310626 |
Method for forming a patterned layer using dielectric materials as a light-sensitive material |
May 10, 1994 |
| A method for forming a patterned layer of material begins by providing a substrate (12). A device layer (14) is formed overlying the substrate (12). A layer (16) is formed over the device layer (14). Layer (16) is further characterized as being an inorganic dielectric material, such as a |
| 5188979 |
Method for forming a nitride layer using preheated ammonia |
February 23, 1993 |
| A process for forming a titanium nitride barrier layer in semiconductor devices using preheated ammonia reduces susceptibility to junction spiking. In one form of the invention, a substrate having an overlying layer of titanium is heated to a predetermined temperature in a reaction c |
| 5126283 |
Process for the selective encapsulation of an electrically conductive structure in a semiconduct |
June 30, 1992 |
| A process for fabricating an improved semiconductor device is disclosed wherein a protective layer of Al.sub.2 O.sub.3 is selectively formed to encapsulate a refractory-metal conductor. To form the Al.sub.2 O.sub.3 layer, first an Al/refractory-metal alloy is selectively formed on the |
