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Gregory J. Faanes Patents
Inventor:
Faanes; Gregory J.
Address:
Eau Claire, WI
No. of patents:
3
Patents:




Patent Number Title Of Patent Date Issued
7334110 Decoupled scalar/vector computer architecture system and method February 19, 2008
In a computer system having a scalar processing unit and a vector processing unit, wherein the vector processing unit includes a vector dispatch unit, a system and method of decoupling operation of the scalar processing unit from that of the vector processing unit, the method compris
6665774 Vector and scalar data cache for a vector multiprocessor December 16, 2003
A common scalar/vector data cache apparatus and method for a scalar/vector computer. One aspect of the present invention provides a computer system including a memory. The memory includes a plurality of sections. The computer system also includes a scalar/vector processor coupled to the
6496902 Vector and scalar data cache for a vector multiprocessor December 17, 2002
A common scalar/vector data cache apparatus and method for a scalar/vector computer. One aspect of the present invention provides a computer system including a memory. The memory includes a plurality of sections. The computer system also includes a scalar/vector processor coupled to the


 
 
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