| Patent Number |
Title Of Patent |
Date Issued |
| RE31967 |
Gang bonding interconnect tape for semiconductive devices and method of making same |
August 13, 1985 |
| A gang bonding interconnect tape for use in an automatic bonding machine for gang bonding of semiconductive devices is fabricated by depositing a series of electrically insulative support structures, such as rings of epoxy resin, onto a metallic tape, as of copper, there being at least o |
| 7066741 |
Flexible circuit connector for stacked chip module |
June 27, 2006 |
| The present invention provides a flexible circuit connector for electrically coupling IC devices to one another in a stacked configuration. Each IC device includes: (1) a package having top, bottom, and peripheral sides; and (2) external leads that extend out from at least one of the |
| 6919626 |
High density integrated circuit module |
July 19, 2005 |
| The present invention provides a method and apparatus for fabricating densely stacked ball-grid-array packages into a three-dimensional multi-package array. Integrated circuit packages are stacked on one another to form a module. Lead carriers provide an external point of electrical |
| 6608763 |
Stacking system and method |
August 19, 2003 |
| A system and method for selectively stacking and interconnecting individual integrated circuit devices to create a high density integrated circuit module. Connections between stack elements are made through carrier structures that provide inter-element connections that substantially |
| 6572387 |
Flexible circuit connector for stacked chip module |
June 3, 2003 |
| The present invention provides a flexible circuit connector for electrically coupling IC devices to one another in a stacked configuration. Each IC device includes: (1) a package having top, bottom, and peripheral sides; and (2) external leads that extend out from at least one of the |
| 6310392 |
Stacked micro ball grid array packages |
October 30, 2001 |
| Integrated circuit modules made in accordance with the methods of the present invention have multiple Ball-Grid Array (BGA) packages mounted to a substantially planar support substrate. Each package is inclined at an angle to the support substrate and partially overlaps another package. |
| 6288907 |
High density integrated circuit module with complex electrical interconnect rails having electri |
September 11, 2001 |
| A high density integrated circuit module having complex electrical interconnection is described, which includes a plurality of stacked level-one integrated circuit devices, wherein each level-one device includes an integrated circuit die and a plurality of electrical leads extending |
| 6205654 |
Method of manufacturing a surface mount package |
March 27, 2001 |
| The present invention provides a method and apparatus for fabricating densely stacked ball-grid-array packages into a three-dimensional multi-package array. Integrated circuit packages are stacked on one another to form a module. Lead carriers provide an external point of electrical |
| 6194247 |
Warp-resistent ultra-thin integrated circuit package fabrication method |
February 27, 2001 |
| The present invention provides a method for fabricating modified integrated circuit packages that are ultra-thin and resist warping. The integrated circuit packages are made thinner by removing some of the casing material uniformly from the upper and lower major surfaces of the integrate |
| 6190939 |
Method of manufacturing a warp resistant thermally conductive circuit package |
February 20, 2001 |
| An integrated circuit package for improved warp resistance and heat dissipation is described. The LOC package includes: an integrated circuit die having an upper, active face, and a multi-layered, substantially planar lead frame mounted to the active face of the die, where the lead f |
| 6168970 |
Ultra high density integrated circuit packages |
January 2, 2001 |
| Thin and durable level-one and level-two integrated circuit packages are provided. A thin and durable level-one package is achieved in one method involving a molding technique of evenly applying molding compound to an integrated circuit die element. The casing surrounding a die element m |
| 6049123 |
Ultra high density integrated circuit packages |
April 11, 2000 |
| Thin and durable level-one and level-two integrated circuit packages are provided. A thin and durable level-one package is achieved in one method involving a molding technique of evenly applying molding compound to an integrated circuit die element. The casing surrounding a die element m |
| 6025642 |
Ultra high density integrated circuit packages |
February 15, 2000 |
| Thin and durable level-one and level-two integrated circuit packages are provided. A thin and durable level-one package is achieved in one method involving a molding technique of evenly applying molding compound to an integrated circuit die element. The casing surrounding a die element m |
| 5978227 |
Integrated circuit packages having an externally mounted lead frame having bifurcated distal lea |
November 2, 1999 |
| The present invention is a rail-less bus system for a high density integrated circuit package, or module, made up of a plurality of vertically stacked high density integrated circuit devices. Each device has leads extending therefrom with bifurcated or trifurcated distal lead ends wh |
| 5960539 |
Method of making high density integrated circuit module |
October 5, 1999 |
| A high density integrated circuit module having complex electrical interconnection is described, which includes a plurality of stacked level-one integrated circuit devices, wherein each level-one device includes an integrated circuit die and a plurality of electrical leads extending |
| 5945732 |
Apparatus and method of manufacturing a warp resistant thermally conductive integrated circuit p |
August 31, 1999 |
| An integrated circuit package for improved warp resistance and heat dissipation is described. The LOC package includes: an integrated circuit die having an upper, active face, and a multi-layered, substantially planar lead frame mounted to the active face of the die, where the lead f |
| 5895232 |
Three-dimensional warp-resistant integrated circuit module method and apparatus |
April 20, 1999 |
| A method and apparatus for achieving a three-dimensional high density warp-resistant integrated circuit module is provided. Selected individual integrated circuit packages which comprise the module are mounted with a thin stiffener, or a thin layer of material having a coefficient of |
| 5864175 |
Wrap-resistant ultra-thin integrated circuit package fabrication method |
January 26, 1999 |
| The present invention provides a method for fabricating modified integrated circuit packages that are ultra-thin and resist warping. The integrated circuit packages are made thinner by removing some of the casing material uniformly from the upper and lower major surfaces of the integrate |
| 5843807 |
Method of manufacturing an ultra-high density warp-resistant memory module |
December 1, 1998 |
| An ultra high-density integrated circuit module which includes a plurality of individual high-density integrated circuit packages. A plurality of the ultra high-density integrated circuit memory modules may be combined to form an ultra high-density memory bank for use in computers, or ot |
| 5828125 |
Ultra-high density warp-resistant memory module |
October 27, 1998 |
| An ultra high-density integrated circuit module which includes a plurality of individual high-density integrated circuit packages. A plurality of the ultra high-density integrated circuit memory modules may be combined to form an ultra high-density memory bank for use in computers, or ot |
| 5804870 |
Hermetically sealed integrated circuit lead-on package configuration |
September 8, 1998 |
| A hermetically sealed ceramic integrated circuit package and method for achieving same, the package including an internal lead frame attached to an integrated circuit die in a lead-on-chip configuration, an external lead frame attached to the package exterior in a lead-on-package con |
| 5801437 |
Three-dimensional warp-resistant integrated circuit module method and apparatus |
September 1, 1998 |
| A method and apparatus for achieving a three-dimensional high density warp-resistant integrated circuit module is provided. Selected individual integrated circuit packages which comprise the module are mounted with a thin stiffener, or a thin layer of material having a coefficient of |
| 5783464 |
Method of forming a hermetically sealed circuit lead-on package |
July 21, 1998 |
| A hermetically sealed ceramic integrated circuit package and method for achieving same, the package including an internal lead frame attached to an integrated circuit die in a lead-on-chip configuration, an external lead frame attached to the package exterior in a lead-on-package con |
| 5778522 |
Method of manufacturing a high density integrated circuit module with complex electrical interco |
July 14, 1998 |
| A high density integrated circuit module having complex electrical interconnection is described, which includes a plurality of stacked level-one integrated circuit devices, wherein each level-one device includes an integrated circuit die and a plurality of electrical leads extending |
| 5702985 |
Hermetically sealed ceramic integrated circuit heat dissipating package fabrication method |
December 30, 1997 |
| A method for achieving a hermetically sealed ceramic integrated circuit package having good thermal conductivity for efficiently transferring heat from an integrated circuit chip die contained therein. Use of an ultra-thin integrated circuit chip die, thin ceramic housing layers and |
| 5654877 |
Lead-on-chip integrated circuit apparatus |
August 5, 1997 |
| A lead-on-chip integrated circuit assembly comprising at least one extremely thin adhesive layer transferred from a carrier onto the face of an integrated circuit chip, and a lead frame laminated to the last adhesive layer, with cured adhesive acting as an insulator, wherein said lea |
| 5644161 |
Ultra-high density warp-resistant memory module |
July 1, 1997 |
| An ultra high-density integrated circuit module which includes a plurality of individual high-density integrated circuit packages. A plurality of the ultra high-density integrated circuit memory modules may be combined to form an ultra high-density memory bank for use in computers, or ot |
| 5631193 |
High density lead-on-package fabrication method |
May 20, 1997 |
| The present invention provides a method and apparatus for fabricating thermally and electrically improved electronic integrated circuits by laminating one or more lead frames to a standard integrated circuit package such as, for example, a thin small outline package (TSOP). The lead |
| 5615475 |
Method of manufacturing an integrated package having a pair of die on a common lead frame |
April 1, 1997 |
| This invention is for an integrated circuit package which includes two integrated circuit die connected to a common substantially planar lead frame, wherein bond pads on each die face the common lead frame. |
| 5605592 |
Method of manufacturing a bus communication system for stacked high density integrated circuit p |
February 25, 1997 |
| The present invention is a rail-less bus system for a high density integrated circuit package, or module, made up of a plurality of vertically stacked high density integrated circuit devices. Each device has leads extending therefrom with bifurcated or trifurcated distal lead ends wh |
| 5586009 |
Bus communication system for stacked high density integrated circuit packages |
December 17, 1996 |
| The present invention is a rail-less bus system for a high density integrated circuit package, or module, made up of a plurality of vertically stacked high density integrated circuit devices. Each device has leads extending therefrom with bifurcated or trifurcated distal lead ends wh |
| 5585668 |
Integrated circuit package with overlapped die on a common lead frame |
December 17, 1996 |
| This invention is for an integrated circuit package which includes two integrated circuit die connected to a common substantially planar lead frame, wherein bond pads on each die face the common lead frame. |
| 5581121 |
Warp-resistant ultra-thin integrated circuit package |
December 3, 1996 |
| The present invention provides a method for fabricating modified integrated circuit packages that are ultra-thin and resist warping. The integrated circuit packages are made thinner by removing some of the casing material uniformly from the upper and lower major surfaces of the integrate |
| 5572065 |
Hermetically sealed ceramic integrated circuit heat dissipating package |
November 5, 1996 |
| A method and apparatus for achieving a hermetically sealed ceramic integrated circuit package having good thermal conductivity for efficiently transferring heat from an integrated circuit chip die contained therein. Use of an ultra-thin integrated circuit chip die, thin ceramic housi |
| 5566051 |
Ultra high density integrated circuit packages method and apparatus |
October 15, 1996 |
| An ultra-thin level-one integrated circuit package with improved moisture penetration characteristics manufactured using a transfer molded casing with metallic lamination layers is provided. Additionally, a method and apparatus for providing a multiple-element modular package including a |
| 5561591 |
Multi-signal rail assembly with impedance control for a three-dimensional high density integrate |
October 1, 1996 |
| An electrically and thermally conductive rail assembly with impedance control for interconnecting individual level-one integrated circuit packages within a three-dimensional high density integrated circuit package, and methods of manufacturing same. |
| 5552963 |
Bus communication system for stacked high density integrated circuit packages |
September 3, 1996 |
| The present invention is a rail-less bus system for a high density integrated circuit package, or module, made up of a plurality of vertically stacked high density integrated circuit devices. Each device has leads extending therefrom with bifurcated or trifurcated distal lead ends wh |
| 5550711 |
Ultra high density integrated circuit packages |
August 27, 1996 |
| Thin and durable level-one and level-two integrated circuit packages are provided. A thin and durable level-one package is achieved in one method involving a molding technique of evenly applying molding compound to an integrated circuit die element. The casing surrounding a die element m |
| 5543664 |
Ultra high density integrated circuit package |
August 6, 1996 |
| An ultra-thin level-one integrated circuit package with improved moisture penetration characteristics manufactured using a transfer molded casing with metallic lamination layers is provided. Additionally, a method and apparatus for providing a multiple-element modular package including a |
| 5541812 |
Bus communication system for stacked high density integrated circuit packages having an intermed |
July 30, 1996 |
| The present invention is a rail-less bus system for a high density integrated circuit package, or module, made up of a plurality of vertically stacked high density integrated circuit devices. Each device has leads extending therefrom with bifurcated or trifurcated distal lead ends wh |
| 5528075 |
Lead-on-chip integrated circuit apparatus |
June 18, 1996 |
| A method and apparatus for achieving lead-on-chip integrated circuit packages by transferring at least one extremely thin adhesive from a carrier onto the face of integrated circuit chips, laminating a lead frame to the last adhesive layer, curing the adhesive to act as an insulator, |
| 5499160 |
High density integrated circuit module with snap-on rail assemblies |
March 12, 1996 |
| A high density integrated circuit module which includes a plurality of stacked integrated circuit packages, wherein each package includes a casing, an integrated circuit die disposed within the casing and a plurality of electrical interconnect leads extending from the die through the |
| 5498906 |
Capacitive coupling configuration for an intergrated circuit package |
March 12, 1996 |
| The present invention provides capacitive and/or power supply decoupling for an integrated circuit package by utilizing an externally mounted bypass capacitor between power and ground. The bypass capacitor is mounted on internal leads projecting into a cove area formed at one or both end |
| 5493476 |
Bus communication system for stacked high density integrated circuit packages with bifurcated di |
February 20, 1996 |
| The present invention is a rail-less bus system for a high density integrated circuit package, or module, made up of a plurality of vertically stacked high density integrated circuit devices. Each device has leads extending therefrom with bifurcated or trifurcated distal lead ends wh |
| 5484959 |
High density lead-on-package fabrication method and apparatus |
January 16, 1996 |
| The present invention provides a method and apparatus for fabricating thermally and electrically improved electronic integrated circuits by laminating one or more lead frames to a standard integrated circuit package such as, for example, thin small outline package (TSOP). The lead fr |
| 5479318 |
Bus communication system for stacked high density integrated circuit packages with trifurcated d |
December 26, 1995 |
| The present invention is a rail-less bus system for a high density integrated circuit package, or module, made up of a plurality of vertically stacked high density integrated circuit devices. Each device has leads extending therefrom with bifurcated or trifurcated distal lead ends wh |
| 5475920 |
Method of assembling ultra high density integrated circuit packages |
December 19, 1995 |
| A method and apparatus for providing a multiple-element ultra high density level-two integrated circuit modular package utilizing a temporary manufacturing fixture to achieve a stack of individual thin ultra high density integrated circuit packages. |
| 5455740 |
Bus communication system for stacked high density integrated circuit packages |
October 3, 1995 |
| The present invention is a rail-less bus system for a high density integrated circuit package, or module, made up of a plurality of vertically stacked high density integrated circuit devices. Each device has leads extending therefrom with bifurcated or trifurcated distal lead ends wh |
| 5448450 |
Lead-on-chip integrated circuit apparatus |
September 5, 1995 |
| A lead-on-chip integrated circuit package comprising at least one extremely thin adhesive layer transferred from a carrier onto the face of integrated circuit chips, and a lead frame laminated to the last adhesive layer, with cured adhesive acting as an insulator, integrated circuit chip |
| 5446620 |
Ultra high density integrated circuit packages |
August 29, 1995 |
| Thin and durable level-one and level-two integrated circuit packages are provided. Moisture-barriers may be provided to upper and/or lower surfaces of the thin level-one package. Additionally, a thin level-one package may be constructed with one or more metal layers to prevent warpage. T |
