| Patent Number |
Title Of Patent |
Date Issued |
| 6528829 |
Integrated circuit structure having a charge injection barrier |
March 4, 2003 |
| The invention relates to an integrated circuit structure that includes a substrate wafer having an active device layer disposed on a surface of the substrate wafer and having an electrically conductive element contained therein. The integrated circuit structure further comprises a barrie |
| 6408860 |
Method for cleaning phosphorus from an MBE chamber |
June 25, 2002 |
| A method for cleaning phosphorus from a MBE vacuum chamber by freezing the panel (22) placed within the vacuum chamber (10) onto which excess phosphorus is deposited. The panel is connected to a source of cold nitrogen (24) which cools the panel. Water is introduced after the panels |
| 6365478 |
Solid state electronic device fabrication using crystalline defect control |
April 2, 2002 |
| A solid state electronic device (40) comprising a substrate (30) and layers (32 and 34) is fabricated to control the formation of crystalline defects to control at least one characteristic of the device, such as current gain beta. The formation of crystalline defects preferably is contro |
| 5668387 |
Relaxed channel high electron mobility transistor |
September 16, 1997 |
| A pseudomorphic HEMT having a partially relaxed InGaAs channel layer. In order to increase device performance and lower the electron transport energy levels within the potential well defined by the conduction band of the channel layer, the channel layer thickness is increased beyond a |
