| Patent Number |
Title Of Patent |
Date Issued |
| 7038940 |
Pulsed write techniques for magneto-resistive memories |
May 2, 2006 |
| A magneto-resistive memory that has a shared word line and sense line is disclosed. By providing the shared word line and sense line, the number of relatively large drivers required to drive the word line and sense line currents can be reduced. This reduces the peripheral overhead of the |
| 6992918 |
Methods of increasing write selectivity in an MRAM |
January 31, 2006 |
| MRAM architectures are disclosed that produce an increased write margin and write selectivity without significantly reducing the packing density of the memory. The major axes of the magneto-resistive bits are offset relative to the axes of the digital lines to produce a magnetic field |
| 6850431 |
Pulsed write techniques for magneto-resistive memories |
February 1, 2005 |
| A magneto-resistive memory that has a shared word line and sense line is disclosed. By providing the shared word line and sense line, the number of relatively large drivers required to drive the word line and sense line currents can be reduced. This reduces the peripheral overhead of the |
| 6791856 |
Methods of increasing write selectivity in an MRAM |
September 14, 2004 |
| MRAM architectures are disclosed that produce an increased write margin and write selectivity without significantly reducing the packing density of the memory. The major axes of the magneto-resistive bits are offset relative to the axes of the digital lines to produce a magnetic field |
| 6756240 |
Methods of increasing write selectivity in an MRAM |
June 29, 2004 |
| MRAM architectures are disclosed that produce an increased write margin and write selectivity without significantly reducing the packing density of the memory. The major axes of the magneto-resistive bits are offset relative to the axes of the digital lines to produce a magnetic field |
| 6724654 |
Pulsed write techniques for magneto-resistive memories |
April 20, 2004 |
| A magneto-resistive memory that has a shared word line and sense line is disclosed. By providing the shared word line and sense line, the number of relatively large drivers required to drive the word line and sense line currents can be reduced. This reduces the peripheral overhead of the |
| 6522574 |
MRAM architectures for increased write selectivity |
February 18, 2003 |
| MRAM architectures are disclosed that produce an increased write margin and write selectivity without significantly reducing the packing density of the memory. The major axes of the magneto-resistive bits are offset relative to the axes of the digital lines to produce a magnetic field |
| 6493259 |
Pulse write techniques for magneto-resistive memories |
December 10, 2002 |
| A magneto-resistive memory that has a shared word line and sense line is disclosed. By providing the shared word line and sense line, the number of relatively large drivers required to drive the word line and sense line currents can be reduced. This reduces the peripheral overhead of the |
| 6424564 |
MRAM architectures for increased write selectivity |
July 23, 2002 |
| MRAM architectures are disclosed that produce an increased write margin and write selectivity without significantly reducing the packing density of the memory. The major axes of the magneto-resistive bits are offset relative to the axes of the digital lines to produce a magnetic field |
| 6424561 |
MRAM architecture using offset bits for increased write selectivity |
July 23, 2002 |
| MRAM architectures are disclosed that produce an increased write margin and write selectivity without significantly reducing the packing density of the memory. The major axes of the magneto-resistive bits are offset relative to the axes of the digital lines to produce a magnetic field |
