| Patent Number |
Title Of Patent |
Date Issued |
| 7353485 |
Method of flexible clock placement for integrated circuit designs using integer linear programmi |
April 1, 2008 |
| A method of global clock placement for a circuit design to be implemented on a programmable logic device (PLD) can include identifying clock properties for the circuit design and identifying physical clock region attributes for the PLD. The method further can include specifying an In |
| 7299439 |
Assignment of I/O objects with multiple I/O standards to virtual I/O banks using integer linear |
November 20, 2007 |
| A method of input/output (I/O) assignment for a circuit design for a programmable logic device (PLD) can include determining I/O types for I/O objects specified by the circuit design, defining a plurality of virtual I/O bank-groups, wherein each virtual I/O bank-group includes at least |
| 7194722 |
Cost-independent critically-based target location selection for combinatorial optimization |
March 20, 2007 |
| A method of physical design for a programmable logic device can include associating target locations for movable objects with criticality measures and calculating the criticality measure for each target location. A probability for each target location can be calculated. The probabili |
| 7194721 |
Cost-independent criticality-based move selection for simulated annealing |
March 20, 2007 |
| A method of physical design for a programmable logic device (PLD) can include associating movable objects of the PLD with a criticality measure that is dependent upon timing information for a configuration of the PLD (115). The method further can include calculating the criticality measu |
| 7137090 |
Path slack phase adjustment |
November 14, 2006 |
| Method and apparatus for phase-timing compensation is described. More particularly, a clock source and a clock sink of a path are identified for phase-timing compensation for a design. An absolute path slack is obtained, and phase offset of the clock source relative to the clock sink |
| 6760899 |
Dedicated resource placement enhancement |
July 6, 2004 |
| Method and code for dedicated resource placement enhancement is described. More particularly, a local area of a network is obtained for determining placement options of logic blocks to increase availability of dedicated resources within the local area. Each placement option is scored. Th |
