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Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Inventor:
Yu; Cheeman
Address:
Madison, WI
No. of patents:
7
Patents:












Patent Number Title Of Patent Date Issued
8232145 Methods of promoting adhesion between transfer molded IC packages and injection molded plastics July 31, 2012
A flash memory card and methods of manufacturing same are disclosed. The card includes a semiconductor package fabricated to receive a single-sided or double-sided lid. A surface of the semiconductor package may be formed with holes, trenches and/or pockmarks. After the holes, trench
8217522 Printed circuit board with coextensive electrical connectors and contact pad areas July 10, 2012
A printed circuit board is disclosed having coextensive electrical connectors and contact pad areas. Areas of the contact pads where the traces and/or vias are located may be etched away to ensure electrical isolation between the traces, vias and contact pads.
8129272 Hidden plating traces March 6, 2012
A strengthened semiconductor die substrate and package are disclosed. The substrate may include contact fingers formed with nonlinear edges. Providing a nonlinear contour to the contact finger edges reduces the mechanical stress exerted on the semiconductor die which would otherwise
8110439 Method of stacking and interconnecting semiconductor packages via electrical connectors extendin February 7, 2012
An electronic component is disclosed including a plurality of stacked semiconductor packages. A first such embodiment includes an internal connector for electrically coupling the stacked semiconductor packages. A second such embodiment includes an external connector for electrically
8053880 Stacked, interconnected semiconductor package November 8, 2011
An electronic component is disclosed including a plurality of stacked semiconductor packages. A first such embodiment includes an internal connector for electrically coupling the stacked semiconductor packages. A second such embodiment includes an external connector for electrically
8053276 Method of stacking and interconnecting semiconductor packages via electrical connectors extendin November 8, 2011
An electronic component is disclosed including a plurality of stacked semiconductor packages. A first such embodiment includes an internal connector for electrically coupling the stacked semiconductor packages. A second such embodiment includes an external connector for electrically
7939944 Semiconductor die having a redistribution layer May 10, 2011
A semiconductor device having a redistribution layer, and methods of forming same, are disclosed. After fabrication of semiconductor die on a wafer, a tape assembly is applied onto a surface of the wafer, in contact with the surfaces of each semiconductor die on the wafer. The tape a










 
 
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