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Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Inventor:
Yoshimi; Masanori
Address:
Fukuyama, JP
No. of patents:
3
Patents:












Patent Number Title Of Patent Date Issued
6737344 Method for manufacturing nonvolatile semiconductor memory with narrow variation in threshold vol May 18, 2004
In a method for manufacturing a memory cell of a nonvolatile semiconductor memory, a floating gate, first insulating film and control gate are successively stacked on a tunnel oxide film formed on a substrate of the nonvolatile semiconductor memory. The control gate, the first insulating
6395619 Process for fabricating a semiconductor device May 28, 2002
The present invention provides a process for fabricating semiconductor device comprising the steps of: forming an etching-stop layer on a semiconductor substrate; patterning the etching-stop layer so that the etching-stop layer remains in a region to be an active region and is remove
6091632 Nonvolatile semiconductor storage device having a plurality of blocks of memory cell transistors July 18, 2000
A plurality of blocks of memory cell transistors are formed on the respective isolated wells. In a write stage, a predetermined write-stage well voltage is applied to the well of a selected block including the memory cell transistors to be subjected to a write operation, a bias volta










 
 
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