| Patent Number |
Title Of Patent |
Date Issued |
| 7613903 |
Data processing device with instruction translator and memory interface device to translate non- |
November 3, 2009 |
| A data processing device includes a processor core, and a memory interface portion arranged between the processor core and an external memory mapped into a predetermined external memory space. The memory interface portion includes a fetch circuit for receiving an address value for access |
| 7346760 |
Data processing apparatus of high speed process using memory of low speed and low power consumpt |
March 18, 2008 |
| When fetching an instruction from a plurality of memory banks, a first pipeline cycle corresponding to selection of a memory bank and a second pipeline cycle corresponding to instruction readout are generated to carry out a pipeline process. Only the selected memory bank can be prech |
| 7065751 |
Program execution device operating based on compressed code |
June 20, 2006 |
| A program execution device with a small required memory storage capacity includes: a compressed code storing portion storing a code which has been compressed on a prescribed unit basis of a program described in a prescribed language; an expanding portion connected to the compressed c |
| 6820252 |
Selective conversion to native code using hardware translator, software translator, and software |
November 16, 2004 |
| A data processor includes a hardware translator converting non-native code into a native code to a processor, a software translator converting non-native code into a native code to the processor by software, and a software interpreter sequentially interpreting a code that is non-native |
| 6792045 |
Image signal transcoder capable of bit stream transformation suppressing deterioration of pictur |
September 14, 2004 |
| An MPEG2 decoder portion decodes an input bit stream and outputs a digital decoded image while extracting coding information and supplying the same to a control portion. An MPEG2 encoder portion re-encodes the digital decoded image output from the MPEG2 decoder portion. Coding informatio |
| 6718443 |
Semiconductor integrated circuit device and electronic system for executing data processing by u |
April 6, 2004 |
| A semiconductor circuit device (encoder) is provided with: a functional block for carrying out an encoding process and for generating a first access signal for accessing a memory; a slave IF terminal for receiving a second access signal; and a first selector having a first connection mod |
| 6687299 |
Motion estimation method and apparatus for interrupting computation which is determined not to p |
February 3, 2004 |
| A motion estimation method capable of setting an optimum threshold value and allowing high speed processing includes the steps of: sequentially selecting one of blocks to be searched from a search range; sequentially calculating a difference between corresponding sample values of a r |
| 6594396 |
Adaptive difference computing element and motion estimation apparatus dynamically adapting to in |
July 15, 2003 |
| An adaptive difference computing element which consumes less power without any decrease in calculation accuracy includes: a first circuit receiving first and second data with the same bit lengths and each having bits at one and the other ends, determining if a prescribed relation is obta |
| 6333571 |
MOS integrated circuit device operating with low power consumption |
December 25, 2001 |
| In accordance with selection signals corresponding to an operation mode from a mode detection circuit, the voltage levels of back gate voltages applied to the back gates of MOS transistors included in internal circuitry are selected, by the selection signals, among the voltages from |
| 6097113 |
MOS integrated circuit device operating with low power consumption |
August 1, 2000 |
| In accordance with selection signals corresponding to an operation mode from a mode detection circuit, the voltage levels of back gate voltages applied to the back gates of MOS transistors included in internal circuitry are selected, by the selection signals, among the voltages from |
| 5659714 |
Data processor including memory for associating data elements of two-dimensional array which are |
August 19, 1997 |
| There is disclosed a data processor in which the execution of a program, typically classical relaxation, for accessing a large number of data elements on edges of a multi-dimensional array requires a smaller number of buffer lines or cache lines and a smaller number of packets for a |
| 5440704 |
Data processor having branch predicting function |
August 8, 1995 |
| An instruction loaded in an instruction register is decoded by an instruction decoder and the branch predicting bit which indicates whether the instruction is branched or not is read out from a branch predicting mechanism. If it is determined that the instruction is a conditional bra |
| 4802112 |
MOS transistor circuit |
January 31, 1989 |
| When a carry signal generated in an n-th bit is propagated to an (n+1)th bit, two n-MOS transistors (12.sub.n+1 and 13.sub.n+1) connected by a signal line (C.sub.n) are turned on to prompt transition of the signal line (C.sub.n) to a zero potential, thereby to increase the speed for |
| 4796175 |
Instruction fetching in data processing apparatus |
January 3, 1989 |
| A microprocessor has a main memory, an instruction execution unit, and instruction queue for prefetching a series of instructions from the main memory, and an instruction cache. The instruction cache prefetches and stores an instruction next to those stored in the instruction queue by us |
