| Patent Number |
Title Of Patent |
Date Issued |
| 7592199 |
Method for forming pinned photodiode resistant to electrical leakage |
September 22, 2009 |
| A method is provided for reducing or eliminating leakage between a pinned photodiode and shallow trench isolation structure fabricated therewith while optimizing the sensitivity of the photodiode. An N+ region is implanted in a P-type substrate and a P-type well separates the N+ region |
| 7588993 |
Alignment for backside illumination sensor |
September 15, 2009 |
| An apparatus and manufacturing method thereof, wherein an integrated circuit is located in a first region of a substrate having first and second opposing major surfaces, and wherein an alignment mark is located in a second region of the substrate and extends through the substrate bet |
| 7553689 |
Semiconductor device with micro-lens and method of making the same |
June 30, 2009 |
| A semiconductor device including a semiconductor substrate having a photosensor formed therein; a first layer overlying the substrate, the first layer includes a portion having a generally concave shaped surface being the negative shaped of a micro-lens to be formed there over; a sec |
| 7537991 |
Salicided MOS device and one-sided salicided MOS device, and simultaneous fabrication method the |
May 26, 2009 |
| A method of fabricating a salicided MOS and a one-sided salicided MOS device on a semiconductor substrate. A conformal oxide layer and an organic layer are sequentially formed on first and second MOS devices and the substrate. The first MOS has a first gate structure, a first spacer |
| 7507596 |
Method of fabricating a high quantum efficiency photodiode |
March 24, 2009 |
| The present invention is CMOS image sensor and its method of fabrication. This invention provides an efficient structure to improve the quantum efficiency of a CMOS image sensor with borderless contact. The image sensor comprises a N-well/P-substrate type photodiode with borderless c |
| 7485940 |
Guard ring structure for improving crosstalk of backside illuminated image sensor |
February 3, 2009 |
| The present disclosure provides a backside illuminated semiconductor device. The device includes a substrate having a front surface and a back surface; a plurality of sensor elements formed in the substrate, each of the plurality of sensor elements is designed and configured to receive |
| 7479403 |
Pinned photodiode integrated with trench isolation and fabrication method |
January 20, 2009 |
| A photo sensor with pinned photodiode structure integrated with a trench isolation structure. The photo sensor includes a substrate of a first conductivity type, at least one trench in the substrate, at least one doped region of the first conductivity type, and at least one doped reg |
| 7432576 |
Grid metal design for large density CMOS image sensor |
October 7, 2008 |
| A new grid metal design for image sensors is disclosed which is comprised of a semiconductor image sensor chip having a pixel region covering most of the chip and a logic circuit region on the chip periphery. The pixel region contains, an array of image pixels where for each image pixel |
| 7429496 |
Buried photodiode for image sensor with shallow trench isolation technology |
September 30, 2008 |
| A buried photodiode with shallow trench isolation technology is formed in a semiconductor substrate of a first conductive type. A trench having a bottom portion and a sidewall portion is formed in the semiconductor substrate. An isolation region is formed on the bottom portion of the |
| 7423306 |
CMOS image sensor devices |
September 9, 2008 |
| A pixel comprises a substrate comprising a first well region formed in a top portion of the substrate, having a first conductivity type. A plurality of shallow trench isolation (STI) structures is formed in the first well region of the substrate, defining a pixel region over the subs |
| 7387907 |
Image sensor with optical guard ring and fabrication method thereof |
June 17, 2008 |
| An image sensor device and fabrication method thereof wherein a substrate having at least one shallow trench isolation structure therein is provided. At least one photosensor and at least one light emitting element, e.g., such as MOS or LED, are formed in the substrate. The photosens |
| 7348651 |
Pinned photodiode fabricated with shallow trench isolation |
March 25, 2008 |
| A method and system is disclosed for reducing or eliminating leakage between a pinned photodiode and shallow trench isolation structure fabricated therewith while optimizing the sensitivity of the photodiode. Provided is a system with an N+ region implanted in a P-type substrate; a P |
| 7338830 |
Hollow dielectric for image sensor |
March 4, 2008 |
| A plurality of apertures is formed in at least one first insulating layer disposed over a sensor formed in a semiconductor substrate. A second insulating layer is disposed over the at least one first insulating layer and the plurality of apertures in the at least one first insulating |
| 7332368 |
Light guide for image sensor |
February 19, 2008 |
| A new method to form an image sensor device is achieved. The method comprises forming an image sensing array in a substrate comprising a plurality of light detecting diodes with spaces between the diodes. A first dielectric layer is formed overlying the diodes but not the spaces. The |
| 7329912 |
Device and methods for CMOS image sensor having borderless contact |
February 12, 2008 |
| A photodiode device including a well located in a substrate, a floating node located in the well and shallow trench isolation (STI) regions located over and laterally opposing the floating node. A borderless contact buffer layer is located over at least the floating node, and an inte |
| 7326588 |
Image sensor with light guides |
February 5, 2008 |
| An image sensor device and fabrication method thereof. An image sensing array is formed in a substrate, wherein the image sensing array comprises a plurality of photosensors with spaces therebetween. A first dielectric layer with a first refractive index is formed overlying the spaces bu |
| 7309897 |
Electrostatic discharge protector for an integrated circuit |
December 18, 2007 |
| An integrated circuit has functional circuitry coupled to a terminal. An electrostatic discharge protector can be coupled to the terminal to protect the functional circuitry from an electrostatic discharge. A substrate includes a first semiconductor material with a first dopant type. |
| 7288429 |
Image sensor with vertically integrated thin-film photodiode |
October 30, 2007 |
| An image sensor with a vertically integrated thin-film photodiode includes a bottom doped layer of a PIN photodiode imbedded in a dielectric layer, wherein a bottom surface of the bottom doped layer completely contacts its corresponding underlying pixel electrode. The bottom doped layers |
| 7262400 |
Image sensor device having an active layer overlying a substrate and an isolating region in the |
August 28, 2007 |
| An image sensing device. An active layer is disposed overlying a substrate, wherein the active layer has different conductivity with the substrate. A plurality of photodiodes is disposed in the active layer. An isolating region is interposed between two adjacent photodiodes, wherein |
| 7253458 |
CMOS image sensor |
August 7, 2007 |
| A complementary metal oxide semiconductor field effect transistor (CMOS-FET) image sensor. An active photosensing pixel is formed on a substrate. At least one side of the pixel has a width equal to or less than approximately 3 .mu.m. At least one dielectric layer is disposed on the s |
| 7242430 |
High dynamic range image sensor cell |
July 10, 2007 |
| An image sensor cell includes a first MOS transistor coupled to an operating voltage for providing an output voltage of the image sensor cell with the output voltage changing conformingly with a voltage on a gate of the first MOS transistor. A photodiode is coupled to a floating node |
| 7235832 |
Self-aligned rear electrode for diode array element |
June 26, 2007 |
| A PIN active pixel sensor array including self aligned encapsulated electrodes and a method for forming the same the method including forming an electrically conductive layer over a substrate; forming a first doped semiconducting layer over the conductive layer; photolithographically |
| 7180049 |
Image sensor with optical guard rings and method for forming the same |
February 20, 2007 |
| An image sensor with optical guard rings is provided. The optical guard rings are embedded in a stacked inter-metal dielectric layer between the sensor areas, that is, around each pixel. The refraction index (RI) of the optical guard rings is smaller than that of the stacked inter-metal |
| 7145190 |
Pinned photodiode integrated with trench isolation and fabrication method |
December 5, 2006 |
| A photo sensor with pinned photodiode structure integrated with a trench isolation structure. The photo sensor includes a substrate of a first conductivity type, at least one trench in the substrate, at least one doped region of the first conductivity type, and at least one doped reg |
| 7122840 |
Image sensor with optical guard ring and fabrication method thereof |
October 17, 2006 |
| An image sensor device and fabrication method thereof wherein a substrate having at least one shallow trench isolation structure therein is provided. At least one photosensor and at least one light emitting element, e.g., such as MOS or LED, are formed in the substrate. The photosens |
| 7078779 |
Enhanced color image sensor device and method of making the same |
July 18, 2006 |
| A semiconductor device including a substrate having a plurality of image sensing elements formed therein, a plurality of spaced apart color filters overlying the substrate and a light blocking material interposed between adjacent spaced apart color filters. |
| 7061028 |
Image sensor device and method to form image sensor device |
June 13, 2006 |
| A new method to form an image sensor device is achieved. The method comprises forming an image sensing array in a substrate comprising a plurality of light detecting diodes with spaces between the diodes. A first dielectric layer is formed overlying the diodes but not the spaces. The |
| 7038232 |
Quantum efficiency enhancement for CMOS imaging sensor with borderless contact |
May 2, 2006 |
| The present invention is a CMOS image sensor and its method of fabrication. This invention provides an efficient structure to improve the quantum efficiency of a CMOS image sensor with borderless contact. The image sensor comprises a N-well/P-substrate type photodiode with borderless |
| 7012240 |
Image sensor with guard rings and method for forming the same |
March 14, 2006 |
| An image sensor with air gaps as optical guard rings is provided. The air gaps are formed in a stacked insulating layer between the sensor areas, that is, around each pixel. A light transmitting insulating layer is formed on the stacked insulating layer without filling the air gaps. |
| 6998207 |
High performance color filter process for image sensor |
February 14, 2006 |
| A method of fabricating a color filter image sensor, comprising the following sequential steps. A structure having a first color filter layer formed thereover is provided. The first color filter layer is patterned to form at least one first color filter layer portion. A second color |
| 6995411 |
Image sensor with vertically integrated thin-film photodiode |
February 7, 2006 |
| An image sensor has a vertically integrated thin-film photodiode. In one implementation, the image sensor has a substrate, an interconnection structure adjacent to the substrate, wherein the interconnection structure includes a top metal layer comprising a plurality of first metal pa |
| 6982443 |
Hollow dielectric for image sensor |
January 3, 2006 |
| A plurality of apertures is formed in at least one first insulating layer disposed over a sensor formed in a semiconductor substrate. A second insulating layer is disposed over the at least one first insulating layer and the plurality of apertures in the at least one first insulating |
| 6969899 |
Image sensor with light guides |
November 29, 2005 |
| An image sensor device and fabrication method thereof. An image sensing array is formed in a substrate, wherein the image sensing array comprises a plurality of photosensors with spaces therebetween. A first dielectric layer with a first refractive index is formed overlying the spaces bu |
| 6946352 |
CMOS image sensor device and method |
September 20, 2005 |
| A photodiode device including a well located in a substrate, a floating node located in the well and shallow trench isolation (STI) regions located over and laterally opposing the floating node. A borderless contact buffer layer is located over at least the floating node, and an inte |
| 6897504 |
Salicided MOS device and one-sided salicided MOS device, and simultaneous fabrication method the |
May 24, 2005 |
| A method of fabricating a salicided MOS and a one-sided salicided MOS device on a semiconductor substrate. A conformal oxide layer and an organic layer are sequentially formed on first and second MOS devices and the substrate. The first MOS has a first gate structure, a first spacer |
| 6852566 |
Self-aligned rear electrode for diode array element |
February 8, 2005 |
| A PIN active pixel sensor array including self aligned encapsulated electrodes and a method for forming the same the method including forming an electrically conductive layer over a substrate; forming a first doped semiconductor layer over the conductive layer; photolithographically |
| 6815787 |
Grid metal design for large density CMOS image sensor |
November 9, 2004 |
| A new grid metal design for image sensors is disclosed which is comprised of a semiconductor image sensor chip having a pixel region covering most of the chip and a logic circuit region on the chip periphery. The pixel region contains an array of image pixels where for each image pixel t |
| 6806521 |
Integrated high performance MOS tunneling LED in ULSI technology |
October 19, 2004 |
| A new method and structure for the combined creation of CMOS devices and LED devices. The process starts with a substrate over the surface of which are designated a first surface region for the creation of CMOS devices there-over and a second surface region for the creation of LED device |
| 6803250 |
Image sensor with complementary concave and convex lens layers and method for fabrication thereo |
October 12, 2004 |
| A method for forming an optoelectronic product provides for forming a concave lensing layer registered with a photoactive region within a substrate. The concave lensing layer is formed employing an isotropic etching method. Registered in turn with a concavity with the concave lensing |
| 6707080 |
Method for making spectrally efficient photodiode structures for CMOS color imagers |
March 16, 2004 |
| A method for making an array of photodiodes with more uniform optical spectral response for the red, green, and blue pixel cells on a CMOS color imager is achieved. After forming a field oxide on a substrate to electrically isolate device areas for CMOS circuits, an array of deep N d |
| 6642076 |
Asymmetrical reset transistor with double-diffused source for CMOS image sensor |
November 4, 2003 |
| A new method to form CMOS image sensors in the manufacture of an integrated circuit device is achieved. The method comprises providing a semiconductor substrate. Sensor diodes are formed in the semiconductor substrate each comprising a first terminal and a second terminal. Gates are form |
| 6635936 |
SRAM layout for relaxing mechanical stress in shallow trench isolation technology |
October 21, 2003 |
| An SRAM device has STI regions separated by mesas and doped regions including source/drain regions, active areas, wordline conductors and contacts in a semiconductor substrate is made with a source region has 90.degree. transitions in critical locations. Form a dielectric layer above |
| 6531752 |
Stripe photodiode element with high quantum efficiency for an image sensor cell |
March 11, 2003 |
| A method of fabricating a stripe photodiode element, for an image sensor cell, has been developed. The stripe photodiode element is comprised of a narrow width, serpentine shaped, lightly doped N type region, in a P well region. The use of the serpentine shaped region results in increase |
| 6518085 |
Method for making spectrally efficient photodiode structures for CMOS color imagers |
February 11, 2003 |
| A method for making an array of photodiodes with more uniform optical spectral response for the red, green, and blue pixel cells on a CMOS color imager is achieved. After forming a field oxide on a substrate to electrically isolate device areas for CMOS circuits, an array of deep N d |
| 6372603 |
Photodiode with tightly-controlled junction profile for CMOS image sensor with STI process |
April 16, 2002 |
| A method for forming a high performance photodiode with tightly-controlled junction profile for CMOS image sensor with STI process. The following steps are performed: providing a substrate; forming a hard mask layer for defining a pattern on the substrate; etching the substrate on the su |
| 6351016 |
Technology for high performance buried contact and tungsten polycide gate integration |
February 26, 2002 |
| A buried contact junction is described. A gate silicon oxide layer is provided over the surface of a semiconductor substrate. A polysilicon layer is deposited overlying the gate oxide layer. A hard mask layer is deposited overlying the polysilicon layer. The hard mask and polysilicon |
| 6350662 |
Method to reduce defects in shallow trench isolations by post liner anneal |
February 26, 2002 |
| A method to form shallow trench isolations with reduced substrate defects by using a nitrogen anneal is achieved. A silicon substrate is provided. The silicon substrate is etched where not protected by a photoresist mask to form shallow trenches where shallow trench isolations are planne |
| 6323054 |
Lateral P-I-N photodiode element with high quantum efficiency for a CMOS image sensor |
November 27, 2001 |
| A process for fabricating a lateral photodiode element, for an image sensor cell, with an increased depletion region, has been developed. The process features protecting a portion of the semiconductor substrate from ion implantation procedures used to create the P well, and the N well |
| 6309905 |
Stripe photodiode element with high quantum efficiency for an image sensor cell |
October 30, 2001 |
| A method of fabricating a stripe photodiode element, for an image sensor cell, has been developed. The stripe photodiode element is comprised of a narrow width, serpentine shaped, lightly doped N type region, in a P well region. The use of the serpentine shaped region results in increase |
| 6271570 |
Trench-free buried contact |
August 7, 2001 |
| A new method of forming an improved buried contact junction is described. A gate silicon oxide layer is provided over the surface of a semiconductor substrate. A polysilicon layer is deposited overlying the gate oxide layer. A hard mask layer is deposited overlying the polysilicon layer. |
