| Patent Number |
Title Of Patent |
Date Issued |
| 7375013 |
Semiconductor integrated circuit device and process for manufacturing the same |
May 20, 2008 |
| Formation of an WN.sub.X film 24 constituting a barrier layer of a gate electrode 7A having a polymetal structure is effected in an atmosphere containing a high concentration nitrogen gas, whereby release of N (nitrogen) from the WN.sub.X film 24 is suppressed in the heat treatment s |
| 7300833 |
Process for producing semiconductor integrated circuit device |
November 27, 2007 |
| When an oxidation treatment for regenerating a gate insulating film 6 is performed after forming gate electrodes 7A of a polymetal structure in which a WN.sub.x film and a W film are stacked on a polysilicon film, a wafer 1 is heated and cooled under conditions for reducing a W oxide 27 |
| 7253465 |
Semiconductor integrated circuit device and manufacturing method thereof |
August 7, 2007 |
| In a dual polymetal gate electrode, the contact resistance at the interface of silicon films increases due to mutual-diffusion of impurities of p-type and n-type silicon films through a refractory metal and metal nitride deposited thereon. A way of inhibiting the phenomenon is carbon |
| 7221056 |
Semiconductor integrated circuit device and manufacturing method thereof |
May 22, 2007 |
| A manufacturing process for a semiconductor integrated circuit device prevents occurrence of reaction between metal wiring and a boron-doped silicon plug over it in heat treatment for a MOS transistor to be formed over them and reduces the possibility of rise in contact resistance. M |
| 7144766 |
Method of manufacturing semiconductor integrated circuit device having polymetal gate electrode |
December 5, 2006 |
| When an oxidation treatment for regenerating a gate insulating film 6 is performed after forming gate electrodes 7A of a polymetal structure in which a WN.sub.x film and a W film are stacked on a polysilicon film, a wafer 1 is heated and cooled under conditions for reducing a W oxide 27 |
| 7122469 |
Fabrication process of a semiconductor integrated circuit device |
October 17, 2006 |
| With a view to preventing the oxidation of a metal film at the time of light oxidation treatment after gate patterning and at the same time to making it possible to control the reproducibility of oxide film formation and homogeneity of oxide film thickness at gate side-wall end portions, |
| 7105394 |
Semiconductor device and a method of manufacturing the same |
September 12, 2006 |
| A method of manufacturing a semiconductor device having an n-type FET and p-type FET, each formed over a semiconductor substrate, calls for (a) forming, over the n-type FET and p-type FET, a first insulating film, for generating a tensile stress in the channel formation region of the n-t |
| 7053459 |
Semiconductor integrated circuit device and process for producing the same |
May 30, 2006 |
| Formation of an WN.sub.x film 24 constituting a barrier layer of a gate electrode 7A having a polymetal structure is effected in an atmosphere containing a high concentration nitrogen gas, whereby release of N (nitrogen) from the WN.sub.x film 24 is suppressed in the heat treatment s |
| 7049665 |
Method of manufacturing a dual gate semiconductor device with a poly-metal electrode |
May 23, 2006 |
| In order to realize a dual gate CMOS semiconductor device with little leakage of boron that makes it possible to divisionally doping a p-type impurity and an n-type impurity into a polycrystalline silicon layer with one mask, a gate electrode has a high melting point metal/metallic n |
| 7049187 |
Manufacturing method of polymetal gate electrode |
May 23, 2006 |
| When an oxidation treatment for regenerating a gate insulating film 6 is performed after forming gate electrodes 7A of a polymetal structure in which a WN.sub.x film and a W film are stacked on a polysilicon film, a wafer 1 is heated and cooled under conditions for reducing a W oxide 27 |
| 6987069 |
Fabrication process of a semiconductor integrated circuit device |
January 17, 2006 |
| With a view to preventing the oxidation of a metal film at the time of light oxidation treatment after gate patterning and at the same time to making it possible to control the reproducibility of oxide film formation and homogeneity of oxide film thickness at gate side-wall end portions, |
| 6984575 |
Fabrication process of a semiconductor integrated circuit device |
January 10, 2006 |
| Disclosed is a fabrication process of a highly reliable semiconductor device formed by stacking and pattering a polycrystalline silicon film, a tungsten nitride film and a tungsten film over a gate insulator film on a semiconductor substrate, thereby forming gate electrodes. Then, a |
| 6881618 |
Method of manufacturing a dual gate semiconductor device with a poly-metal electrode |
April 19, 2005 |
| In order to realize a dual gate CMOS semiconductor device with little leakage of boron that makes it possible to divisionally doping a p-type impurity and an n-type impurity into a polycrystalline silicon layer with one mask, a gate electrode has a high melting point metal/metallic nitri |
| 6784116 |
Fabrication process of a semiconductor integrated circuit device |
August 31, 2004 |
| With a view to preventing the oxidation of a metal film at the time of light oxidation treatment after gate patterning and at the same time to making it possible to control the reproducibility of oxide film formation and homogeneity of oxide film thickness at gate side-wall end portions, |
| 6784038 |
Process for producing semiconductor integrated circuit device and semiconductor integrated circu |
August 31, 2004 |
| In order to provide a light oxidation process technique for use in a CMOS LSI employing a polymetal gate structure and a dual gate structure, so that both oxidation of a refractory metal film constituting a part of a gate electrode and diffusion of boron contained in a p-type polycry |
| 6750503 |
Stacked gate electrode for a MOS transistor of a semiconductor device |
June 15, 2004 |
| A semiconductor device with an MOS transistor gate electrode in a stacked structure comprising a silicon layer, a metal silicide layer, a reaction barrier layer such as a metal nitride layer and a metallic layer formed from the bottom upwards has an increased circuit performance owing to |
| 6727132 |
Method of manufacturing a dual gate semiconductor device with a poly-metal electrode |
April 27, 2004 |
| In order to realize a dual gate CMOS semiconductor device with little leakage of boron that makes it possible to divisionally doping a p-type impurity and an n-type impurity into a polycrystalline silicon layer with one mask, a gate electrode has a high melting point metal/metallic nitri |
| 6645799 |
Method of manufacturing a dual gate semiconductor device with a poly-metal electrode |
November 11, 2003 |
| In order to realize a dual gate CMOS semiconductor device with little leakage of boron that makes it possible to divisionally doping a p-type impurity and an n-type impurity into a polycrystalline silicon layer with one mask, a gate electrode has a high melting point metal/metallic nitri |
| 6528403 |
Fabrication process of a semiconductor integrated circuit device |
March 4, 2003 |
| With a view to preventing the oxidation of a metal film at the time of light oxidation treatment after gate patterning and at the same time to making it possible to control the reproducibility of oxide film formation and homogeneity of oxide film thickness at gate side-wall end portions, |
| 6503819 |
Fabrication process of a semiconductor integrated circuit device |
January 7, 2003 |
| With a view to preventing the oxidation of a metal film at the time of light oxidation treatment after gate patterning and at the same time to making it possible to control the reproducibility of oxide film formation and homogeneity of oxide film thickness at gate side-wall end portions, |
| 6503788 |
Semiconductor device and method of manufacture thereof |
January 7, 2003 |
| In order to realize a dual gate CMOS semiconductor device with little leakage of boron that makes it possible to divisionally doping a p-type impurity and an n-type impurity into a polycrystalline silicon layer with one mask, a gate electrode has a high melting point metal/metallic nitri |
| 6323115 |
Method of forming semiconductor integrated circuit device with dual gate CMOS structure |
November 27, 2001 |
| In order to provide a light oxidation process technique for use in a CMOS LSI employing a polymetal gate structure and a dual gate structure, so that both oxidation of a refractory metal film constituting a part of a gate electrode and diffusion of boron contained in a p-type polycry |
| 6197702 |
Fabrication process of a semiconductor integrated circuit device |
March 6, 2001 |
| With a view to preventing the oxidation of a metal film at the time of light oxidation treatment after gate patterning and at the same time to making it possible to control the reproducibility of oxide film formation and homogeneity of oxide film thickness at gate side-wall end portions, |
| 4977307 |
Apparatus for heating sample within vacuum chamber |
December 11, 1990 |
| An apparatus for heating a sample within a vacuum chamber according to the present invention includes a preliminary exhaust chamber connected with a vacuum chamber of an analyzer and the like through a gate valve. A sample stage is disposed within the vacuum chamber, and a sample holder |
| 4860086 |
Semiconductor device |
August 22, 1989 |
| A semiconductor device is constructed so that an insulation film is provided in regions other than a protruding portion of a substrate. A polycrystalline silicon layer and a metal silicide layer are formed over said insulation film to provide a multi-layer structure, and a take-out p |
| 4807015 |
Semiconductor device having electrodes and or interconnections of refractory metal film containi |
February 21, 1989 |
| A semiconductor device which is provided with an electrode and/or an interconnection made of a refractory metal film containing silicon oxide is disclosed. A refractory metal film containing silicon oxide has high capability of blocking penetration of ions and is suitable for being e |
| 4577396 |
Method of forming electrical contact to a semiconductor substrate via a metallic silicide or sil |
March 25, 1986 |
| A silicide layer or silicon alloy layer is formed within a surface region of an impurity-doped region on the surface of a semiconductor substrate by implanting and heating any of those metals which can form silicides or silicon alloys with silicon upon heating.The peel of a metallic elec |
| 4505028 |
Method of producing semiconductor device |
March 19, 1985 |
| A silicon wafer having a tungsten and/or molybdenum film formed on its surface is heat-treated in hydrogen containing water vapor. Thus, silicon can be selectively oxidized without substantially oxidizing tungsten and/or molybdenum. |
| 4458410 |
Method of forming electrode of semiconductor device |
July 10, 1984 |
| After a silicon layer is selectively grown on that part of a silicon substrate surface on which an electrode is to be formed, the silicon layer is reacted with a refractory metal so as to form the electrode made of a metal silicide layer. |
| 4321104 |
Photoetching method |
March 23, 1982 |
| In forming an interconnection pattern on a silicon substrate, an Al-Si alloy is used as an interconnection material, a silicon film is deposited on the Al-Si alloy film, and a photoresist layer is applied and thereafter exposed to light to provide a photoresist pattern to serve as a mask |
