| Patent Number |
Title Of Patent |
Date Issued |
| RE38734 |
Semiconductor switching apparatus and method of controlling a semiconductor switching element |
May 17, 2005 |
| An inductance in a path (R1) from a gate electrode (3G) of a GTO (3) through a gate driver (4) and a node (13) to a cathode electrode (3K) is determined so that a turn-off gain may be not more than 1. At a turn-off, a main current (I.sub.A) is entirely commutated from the gate electrode |
| 7396642 |
Methods of screening for a compound that enhances thermogenesis |
July 8, 2008 |
| The present invention provides a method for screening a substance having a thermogenesis enhancing effect containing a compound having an effect activating PPAR .delta., an agent containing the compound, and an agent having antidiabetic, antiobestic or visceral accumulated fat-lowering |
| 6940708 |
Electronic component |
September 6, 2005 |
| An electronic component includes: an element having a pair of terminal electrodes; and a pair of metal terminals formed of metal materials respectively and connected to the pair of terminal electrodes respectively, in which: a portion of the metal terminal that extends from a base-en |
| 6380619 |
Chip-type electronic component having external electrodes that are spaced at predetermined dista |
April 30, 2002 |
| A ceramic substrate having two side surfaces in a lengthwise direction and two side surfaces in a widthwise direction intersecting each other. The ceramic substrate also includes at least one flat surface in a thicknesswise direction. Internal electrode films are embedded in the cera |
| 5777506 |
Semiconductor switching apparatus and method of controlling a semiconductor switching element |
July 7, 1998 |
| An inductance in a path (R1) from a gate electrode (3G) of a GTO (3) through a gate driver (4) and a node (13) to a cathode electrode (3K) is determined so that a turn-off gain may be not more than 1. At a turn-off, a main current (I.sub.A) is entirely commutated from the gate electrode |
| 5559045 |
Method of fabricating vertical-type double diffused mosfet having a self-aligned field oxide fil |
September 24, 1996 |
| Disclosed are an improved vertical-type double diffused MOSFET which has a self-aligned gate structure and field oxide film and a method of fabricating the same. A silicon nitride film is selectively formed and a well region is formed, after which a self-aligned field oxide film is f |
| 5529940 |
Method of manufacturing a vertical MOSFET having a gate electrode of polycrystalline silicon |
June 25, 1996 |
| A method of manufacturing a MOSFET having a p-type gate electrode made of polycrystalline silicon formed through a gate insulating film on a surface of a conductive semiconductor substrate. The gate electrode contains an n-type impurity in addition to a boron impurity. Low threshold volt |
| 5521410 |
Power semiconductor device comprising vertical double-diffused MOSFETS each having low on-resist |
May 28, 1996 |
| In a vertical double-diffused MOSFET comprising a semiconductor substrate of a first conductivity type, an epitaxial layer of the first conductivity type, and a gate insulating layer, a gate electrode coats the gate insulating layer. The gate electrode has a plurality of polygonal shaped |
| 5408118 |
Vertical double diffused MOSFET having a low breakdown voltage and constituting a power semicond |
April 18, 1995 |
| A vertical double diffused MOSFET includes a gate electrode formed with a plurality of first open windows and at least one second open window connecting two of the first open windows. The first open windows are of a desired polygonal shape and have centers at lattice points of a square |
