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Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Inventor:
Yamamoto; Katsuhiko
Address:
Neyagawa, JP
No. of patents:
5
Patents:




Patent Number Title Of Patent Date Issued
5264920 Word rate conversion processing device for processor circuit for processing digital component vi November 23, 1993
A digital component video signal processor or a digital VTR which can record/reproduce both an extended 4:2:2 signal based on sampling at 18 MHz and a 4:2:2 signal based on sampling at 13.5 MHz while minimizing dummy data to be generated upon recoding/reproduction. The extended 4:2:2 sig
4425585 Video tape recorder immune to third-order distortion noise January 10, 1984
A portable video tape recorder for broadcasting applications comprises a pair of video heads mounted diametrically opposite to each other on the circumference of a rotary cylinder. High and low frequency carriers are modulated by frequency modulators with I and Q signals, respectively, a
4400741 Video tape recorder with inter-channel switching circuit for special modes of reproduction August 23, 1983
In a video tape recorder, luminance and chrominance signals are recorded respectively by first and second transducer heads along separate tracks skewed to the direction of tape motion. The transducer heads are rotated during particular modes such as slow-motion or still picture reproduct
4399472 Phase difference compensation between separately recorded luminance and chrominance signals August 16, 1983
Luminance and chrominance signals, which are interleaved with respective synchronization signals, are recorded through the use of two video transducer heads alternately in skewed separate tracks of a recording tape. Upon reproduction, the timing signals are separated from the luminan
4185301 Scanning velocity modulation system January 22, 1980
A system for compensating image contour by modulating a scanning velocity in accordance with a video signal is disclosed, in which a mean current dissipated in a driving power amplifier is detected to control a gain of an amplifier in a preceding stage for suppressing the increase of pow


 
 
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