Resources Contact Us Home Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE     Inventor: Yamamoto; Akira Address: Mitaka, JP No. of patents: 1 Patents: Patent Number Title Of Patent Date Issued 7129507 Chip mis-position detection method October 31, 2006 The invention is a method for detecting float or peel of semiconductor chips arranged in X and Y axes directions diced and bonded to a dicing tape on a stage. The method includes detecting float or peel of the semiconductor chips in a respective horizontal or longitudinal row arrange       Recently Added Patents Cathode material for secondary batteries with non-aqueous electrolyte, a process for preparing the cathode material and lithium secondary battery containing the same Use of aluminas as capture mass for organometallic silicon complexes Semiconductor device with an improved solder joint ESD protection for bipolar-CMOS-DMOS integrated circuit devices Helical wrapping of single-walled carbon nanotubes by genomic DNA Validating removable fare collection system Torque sensor with a resin housing and a method of manufacturing the same   Randomly Featured Patents Heating device Electrophotographic photosensitive member using microcrystalline silicon Large capacity drainage receptacle Spoon Piperazine derivatives of theophylline Needle selecting arrangement for knitting machines Lubricity coating for plastic coated glass articles Process for manufacturing boron nitride fiber mats Shovel device for loading and transferring sheet of dough particularly for pizzas Process for injecting thermal fluids for food processing © 2006. PatentGenius. All Rights Reserved.