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Inventor:
Yamaguchi; Shinichiro
Address:
Hitachi, JP
No. of patents:
8
Patents:












Patent Number Title Of Patent Date Issued
5146569 System for storing restart address of microprogram, determining the validity, and using valid re September 8, 1992
Method and apparatus for instruction restart processing in a microprogram-controlled data processing apparatus, wherein, in restarting an instruction execution after instruction suspension, the internal information of the data processing apparatus at the time of instruction execution
5003458 Suspended instruction restart processing system based on a checkpoint microprogram address March 26, 1991
Method and apparatus for instruction restart processing in a microprogram - controlled data processing apparatus, wherein, in restarting an instruction execution after instruction suspension, the internal information of the data processing apparatus at the time of instruction executi
4967339 Operation control apparatus for a processor having a plurality of arithmetic devices October 30, 1990
A processor performs a pipelined parallel processing by an operand effective address calculation unit for calculating an operand effective address necessary to execute an instruction and an instruction execution unit for executing the instruction. A 64 bit width data operation is per
4896258 Data processor provided with instructions which refer to both tagged and tagless data January 23, 1990
A data processor for execution of tagged data and tagless data has a decoder for discriminating whether the data is tagged or tagless one and in case of a tagged data, separates a tag part and uses the remaining part for address computation. The data processor also comprises a unit for
4841439 Method for restarting execution interrupted due to page fault in a data processing system June 20, 1989
The present application invention relates to a method for restarting execution of an instruction interrupted due to a page fault. When a page fault occurs during an execution of an instruction, the pertinent page is loaded from an external storage into the main memory and then the access
4839846 Apparatus for performing floating point arithmetic operations and rounding the result thereof June 13, 1989
An operation unit capable of performing round processing at a high speed in a floating point operation. A circuit for detecting an overflow on the condition of a signal representing all 1's in an output of a mantissa shifter and a signal representing round-up, a carry look-ahead circuit
4811269 Bit slice multiplication circuit March 7, 1989
A bit slice multiplication circuit operating to slice a multiplier, produce products for the sliced multipliers and a multiplicand and sum the products to obtain the multiplication result. The circuit includes a slicing unit for slicing the multiplicand, multiplying units corresponding
4764869 Method and apparatus for controlling interruption in the course of instruction execution in a pr August 16, 1988
Method and apparatus for controlling interruption of a processor. When an external interrupt request having a higher priority level than a current program level is detected in the course of the execution of an instruction, the processing is interrupted and an interexecution interrupt










 
 
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