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Inventor:
Yamada; Hiromichi
Address:
Hitachi, JP
No. of patents:
22
Patents:












Patent Number Title Of Patent Date Issued
8589612 Computer system including an interrupt controller November 19, 2013
A computer system which shortens standby time of CPUs and improves CPU processing efficiency of a performance mode upon switching from the performance mode (parallel operation) to a safety mode (master/checker operation) is provided. In a computer system including: at least two CPUs;
8291188 Microcontroller and electronic control unit October 16, 2012
A microcontroller in which respective CPUs execute different applications so as to improve processing performance, and the respective CPUs execute an application that requires safety and mutually compare the results thereof so as to enhance the reliability of write data is provided. The
8095825 Error correction method with instruction level rollback January 10, 2012
This method is an error correction method such that, when an error is detected in a CPU with pipeline structure, a content of a register file is restored by a delayed register file which holds an execute completion state of an [Instruction N] correctly executed before this error, and a
8046137 Microcontroller, control system and design method of microcontroller October 25, 2011
Two data processing units having the same function, one of which is used for a master and the other for comparison, are provided, control of a circuit unit is performed by the master, the master data processing unit and the circuit unit are operated in synchronization with a first clock
7890233 Microcontroller, control system and design method of microcontroller February 15, 2011
Two data processing units having the same function, one of which is used for a master and the other for comparison, are provided, control of a circuit unit is performed by the master, the master data processing unit and the circuit unit are operated in synchronization with a first clock
7765269 Communications system, and information processing device and control device incorporating said c July 27, 2010
This invention provides communications systems that enable broadcasting while making use of the simplicity of the prior art and also provides control devices and information processing systems incorporating the communications system. In this invention, chip-select signals are provide
7752527 Microcontroller and RAM July 6, 2010
A microcontroller in which an increase in hardware is suppressed and data correction capability for software error of RAM can be improved is provided. A microcontroller which performs processing according to a program includes a CPU and a RAM for storing data processed by the CPU, wh
7290124 Data processor employing register banks with overflow protection to enhance interrupt processing October 30, 2007
The present invention prevents a data processor from undesirable operation stop due to an overflow of a plurality of register banks. A status register includes an overflow flag to indicate an overflow of the plurality of register banks. When an interrupt exception occurs in a state i
7260657 Serial data transferring apparatus August 21, 2007
A master unit sends a start signal to a slave unit. When receiving the start signal from the master unit, the slave unit sends, to the master unit, a synchronization field that is a data train (pulse signal) indicative of a transfer clock with which the slave unit is able to perform
7245248 A/D converter and a microcontroller including the same July 17, 2007
In an A/D converter and a microcontroller including the same, the number of selection patterns of analog input channels is increased for each A/D conversion and the A/D conversion is conducted using an A/D converter having only fundamental functions without imposing load onto a CPU. The
6986029 Micro-controller for reading out compressed instruction code and program memory for compressing January 10, 2006
A micro-controller includes a dictionary memory for storing instruction codes which appear in a program, and a compressed code memory for storing compressed codes each converted from each of the instruction codes included in the program. Each compressed code has a word length suffici
6915413 Micro-controller for reading out compressed instruction code and program memory for compressing July 5, 2005
A micro-controller includes a dictionary memory for storing instruction codes which appear in a program, and a compressed code memory for storing compressed codes each converted from each of the instruction codes included in the program. Each compressed code has a word length suffici
6727903 Microprocessor, and graphics processing apparatus and method using the same April 27, 2004
A microprocessor suitable for processing a large quantity of graphics data. Graphics processing apparatus and method using the microprocessor are also disclosed.The microprocessor independent of a CPU has two ports, and performs an instruction fetch and a data access or a memory access s
6609232 Logic compound method and logic compound apparatus August 19, 2003
In logical compound of inter-subblock paths, circuits including all inter-subblock paths are generated. Logical compound is conducted for the generated circuits to achieve logical compound of the inter-subblock paths. By treating inter-subblock paths as intra-subblock paths, no input
6539322 Sensor device March 25, 2003
A sensor device is provided which included a digital arithmetic processing unit which performs arithmetic processing through a program stored therein in advance, a pulse generator for generating pulses through the program, and a unit for causing the output voltage of the sensor device to
6538866 Circuit for protecting a load from an overvoltage March 25, 2003
A circuit for protecting a load from an overvoltage can be integrated together with the load on the same chip by an MOS transistor manufacture process. This overvoltage protecting circuit is composed of a surge protection circuit, an overvoltage detecting circuit and a switching circ
6282136 Semiconductor memory devices and sensors using the same August 28, 2001
In a semiconductor memory device, the drain of a transistor for pre-charging is connected to a data line via the Y switch. Lower level bit signals are input into an X decoder for selecting the word line in a memory cell array; and higher level bit signals are input into a Y decoder f
6229543 Microprocessor, and graphics processing apparatus and method using the same May 8, 2001
A microprocessor for processing a large quantity of graphics data. The microprocessor independent of a CPU has two ports, and performs an instruction fetch and a data access or a memory access simultaneously to two memories mounted on separate buses. A graphics processing apparatus p
5680637 Computer having a parallel operating capability October 21, 1997
A RISC processor is arranged to reduce a code size, make the hardware less complicated, execute a plurality of operations for one machine cycle, and enhance the performance. The processor is capable of executing N instruction each having a short word length for indicating a single op
5623435 Arithmetic unit capable of performing concurrent operations for high speed operation April 22, 1997
An arithmetic unit which accepts two numerical values and executes an operation by the use of the two numerical values; has an adder-subtracter for executing an addition or a subtraction on the basis of two numerical values obtained directly or indirectly from the accepted two numerical
5408426 Arithmetic unit capable of performing concurrent operations for high speed operation April 18, 1995
An arithmetic unit which accepts two numerical values and executes an operation by the use of the two numerical values has an adder-subtracter for executing an addition or a subtraction on the basis of two numerical values obtained directly or indirectly from the accepted two numerical
5388230 Parallel processor having multi-processing units either connected or bypassed in either series o February 7, 1995
A parallel process which includes a plurality of processing units connected to each other via input/output ports. Each of the plurality of processing units includes a memory for storing a program and data, a local bus for inputting/outputting the program and data to and from the memory h










 
 
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