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Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Inventor:
Xang; Qi
Address:
San Jose, CA
No. of patents:
2
Patents:




Patent Number Title Of Patent Date Issued
6559051 Electroless deposition of dielectric precursor materials for use in in-laid gate MOS transistors May 6, 2003
High quality dielectric layers, e.g., high-k dielectric layers comprised of at least one refractory or lanthanum series transition metal oxide or silicate, for use as gate insulator layers in in-laid metal gate MOS transistors and CMOS devices, are formed by electrolessly plating a metal
6300203 Electrolytic deposition of dielectric precursor materials for use in in-laid gate MOS transistor October 9, 2001
High quality dielectric layers, e.g., high-k dielectric layers comprised of at least one refractory or lanthanum series transition metal oxide or silicate, for use as gate insulator layers in in-laid metal gate MOS transistors and CMOS devices, are formed by electrolytically plating a


 
 
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