| Patent Number |
Title Of Patent |
Date Issued |
| RE36469 |
Packaging for semiconductor logic devices |
December 28, 1999 |
| A logic module design is disclosed which incorporates an unencapsulated wafer section or sections. The disclosed module is an improvement over previous designs in that it is less expensive and easier to manufacture due to the reduced number of components and the complexity of the com |
| RE36325 |
Directly bonded SIMM module |
October 5, 1999 |
| A leadframe interconnect package is tape automated bond (TAB) bonded to circuitry on the chip and which provides a circuit connection for subsequent connection to a printed circuit board. The encapsulated chips will replace both the leadframe and printed circuit board (electrical onl |
| D402638 |
Temporary package for semiconductor dice |
December 15, 1998 |
|
| D401567 |
Temporary package for semiconductor dice |
November 24, 1998 |
|
| D394844 |
Temporary package for semiconductor dice |
June 2, 1998 |
|
| 7598167 |
Method of forming vias in semiconductor substrates without damaging active regions thereof and r |
October 6, 2009 |
| Methods for forming through vias in a semiconductor substrate and resulting structures are disclosed. In one embodiment, a through via may be formed by forming a partial via from the active surface through a conductive element thereon and a portion of the semiconductor substrate unde |
| 7591069 |
Methods of bonding solder balls to bond pads on a substrate, and bonding frames |
September 22, 2009 |
| Methods and apparatuses for bonding solder balls to bond pads are described. In one embodiment, portions of a plurality of solder balls are placed within a frame and in registered alignment with individual bond pads over a substrate. While the ball portions are within the frame, the |
| 7589406 |
Stacked semiconductor component |
September 15, 2009 |
| A semiconductor component includes a carrier and multiple semiconductor substrates stacked and interconnected on the carrier. The carrier includes conductive members bonded to corresponding conductive openings on the semiconductor substrates. The component can also include terminal c |
| 7589010 |
Semiconductor devices with permanent polymer stencil and method for manufacturing the same |
September 15, 2009 |
| Methods of manufacturing semiconductor devices using permanent or temporary polymer layers having apertures to expose contact pads and cover the active surfaces of the semiconductor devices. |
| 7579267 |
Methods and systems for fabricating semiconductor components with through wire interconnects (TW |
August 25, 2009 |
| A semiconductor component includes a semiconductor substrate having a substrate contact, and a through wire interconnect (TWI) bonded to the substrate contact. The through wire interconnect (TWI) includes a via through the substrate contact and the substrate, a wire in the via bonded |
| 7561938 |
Method for using data regarding manufacturing procedures integrated circuits (ICS) have undergon |
July 14, 2009 |
| An inventive method in an integrated circuit (IC) manufacturing process for using data regarding repair procedures conducted on ICs at probe to determine whether any further repairs will be conducted later in the manufacturing process includes storing the data in association with a f |
| 7538413 |
Semiconductor components having through interconnects |
May 26, 2009 |
| A semiconductor component includes a semiconductor substrate having a substrate contact on a circuit side thereof in electrical communication with an integrated circuit, and a through interconnect in physical and electrical contact with the substrate contact configured to provide a s |
| 7521296 |
Methods of fabricating a microlens including selectively curing flowable, uncured optically tras |
April 21, 2009 |
| Microlenses for directing radiation toward a sensor of an imaging device include a plurality of mutually adhered layers of cured optically transmissive material. Systems include at least one microprocessor and a substrate including an array of microlenses formed thereon in electrical |
| 7511520 |
Universal wafer carrier for wafer level die burn-in |
March 31, 2009 |
| A reusable burn-in/test fixture for testing unsingulated dice on a semiconductor wafer consisting of two halves. The first half of the test fixture is a wafer cavity plate for receiving the wafer, and the second half establishes electrical communication between the wafer and electric |
| 7504615 |
Microelectronic imagers with optical devices and methods of manufacturing such microelectronic i |
March 17, 2009 |
| Microelectronic imager assemblies comprising a workpiece including a substrate and a plurality of imaging dies on and/or in the substrate. The substrate includes a front side and a back side, and the imaging dies comprise imaging sensors at the front side of the substrate and external |
| 7498675 |
Semiconductor component having plate, stacked dice and conductive vias |
March 3, 2009 |
| A semiconductor component includes a base die and a secondary die stacked on and bonded to the base die. The base die includes conductive vias which form an internal signal transmission system for the component, and allow the circuit side of the secondary die to be bonded to the back sid |
| 7488899 |
Compliant contact pin assembly and card system |
February 10, 2009 |
| A compliant contact pin assembly and a contactor card system are provided. The compliant contact pin assembly includes a contact pin formed from a portion of a substrate with the contact pin compliantly held suspended within the substrate by a compliant coupling structure. The suspension |
| 7488618 |
Microlenses including a plurality of mutually adhered layers of optically transmissive material |
February 10, 2009 |
| Microlenses for directing radiation toward a sensor of an imaging device include a plurality of mutually adhered layers of cured optically transmissive material. Systems include at least one microprocessor and a substrate including an array of microlenses formed thereon in electrical |
| 7482702 |
Semiconductor component sealed on five sides by polymer sealing layer |
January 27, 2009 |
| A semiconductor component includes a thinned semiconductor die having protective polymer layers on up to six surfaces. The component also includes contact bumps on the die embedded in a circuit side polymer layer, and terminal contacts on the contact bumps in a dense area array. A me |
| 7473582 |
Method for fabricating semiconductor component with thinned substrate having pin contacts |
January 6, 2009 |
| A semiconductor component includes back side pin contacts fabricated using a circuit side fabrication method. The component also includes a thinned semiconductor die having a pattern of die contacts, and conductive members formed by filled openings in the die contacts and the die. In |
| 7459393 |
Method for fabricating semiconductor components with thinned substrate, circuit side contacts, c |
December 2, 2008 |
| A method for fabricating a semiconductor component includes the steps of providing a substrate having a contact on a circuit side thereof, forming an opening from a backside of the substrate to the contact, forming a conductive via in the opening in electrical contact with a surface of t |
| 7442643 |
Methods of forming conductive elements using organometallic layers and flowable, curable conduct |
October 28, 2008 |
| A conductive element is formed on a substrate by forming an organometallic layer on at least a portion of a surface of the substrate, heating a portion of the organometallic layer, and removing an unheated portion of the organometallic layer. In other methods, a flowable, uncured con |
| 7432604 |
Semiconductor component and system having thinned, encapsulated dice |
October 7, 2008 |
| A semiconductor component includes a thinned semiconductor die having protective polymer layers on up to six surfaces. The component also includes contact bumps on the die embedded in a circuit side polymer layer, and terminal contacts on the contact bumps in a dense area array. A me |
| 7432600 |
System having semiconductor component with multiple stacked dice |
October 7, 2008 |
| A system includes a semiconductor component having a base die and a secondary die flip chip mounted to the base die. The base die includes a set of stacking contacts for flip chip mounting the secondary die to the base die, and a set of interconnect contacts configured as an internal |
| 7429529 |
Methods of forming through-wafer interconnects and structures resulting therefrom |
September 30, 2008 |
| Methods for forming conductive vias or through-wafer interconnects in semiconductor substrates and resulting through-wafer interconnect structures are disclosed. In one embodiment of the present invention, a method of forming a through-wafer interconnect structure includes the acts o |
| 7419841 |
Microelectronic imagers and methods of packaging microelectronic imagers |
September 2, 2008 |
| Microelectronic imagers and methods for packaging microelectronic imagers are disclosed herein. In one embodiment, a microelectronic imaging unit can include a microelectronic die, an image sensor, an integrated circuit electrically coupled to the image sensor, and a bond-pad electricall |
| 7417325 |
Semiconductor component having thinned die with conductive vias configured as conductive pin ter |
August 26, 2008 |
| A semiconductor component includes a thinned semiconductor die having protective polymer layers on up to six surfaces. The component also includes contact bumps on the die embedded in a circuit side polymer layer, and terminal contacts on the contact bumps in a dense area array. A me |
| 7394267 |
Compliant contact pin assembly and card system |
July 1, 2008 |
| A compliant contact pin assembly and a contactor card system are provided. The compliant contact pin assembly includes a contact pin formed from a portion of a substrate with the contact pin compliantly held suspended within the substrate by a compliant coupling structure. The suspension |
| 7393770 |
Backside method for fabricating semiconductor components with conductive interconnects |
July 1, 2008 |
| A backside method for fabricating a semiconductor component with a conductive interconnect includes the step of providing a semiconductor substrate having a circuit side, a backside, and a substrate contact on the circuit side. The method also includes the steps of forming a substrat |
| 7388294 |
Semiconductor components having stacked dice |
June 17, 2008 |
| A semiconductor package component includes a base die and a secondary die flip chip mounted to the base die. The base die includes a set of stacking contacts for flip chip mounting the secondary die to the base die, and a set of interconnect contacts configured as an internal signal |
| 7385412 |
Systems and methods for testing microfeature devices |
June 10, 2008 |
| Systems and methods for testing microelectronic imagers and microfeature devices are disclosed herein. In one embodiment, a method includes providing a microfeature workpiece including a substrate having a front side, a backside, and a plurality of microelectronic dies. The individual |
| 7382060 |
Semiconductor component having thinned die, polymer layers, contacts on opposing sides, and cond |
June 3, 2008 |
| A semiconductor component includes a thinned semiconductor die having protective polymer layers on up to six surfaces. The component also includes contact bumps on the die embedded in a circuit side polymer layer, and terminal contacts on the contact bumps in a dense area array. A me |
| 7362113 |
Universal wafer carrier for wafer level die burn-in |
April 22, 2008 |
| A reusable burn-in/test fixture for testing unsingulated dice on a semiconductor wafer consists of two halves. The first half of the test fixture is a wafer cavity plate for receiving the wafer, and the second half establishes electrical communication between the wafer and electrical |
| 7358751 |
Contact pin assembly and contactor card |
April 15, 2008 |
| A compliant contact pin assembly and a contactor card system are provided. The compliant contact pin assembly includes a contact pin formed from a portion of a substrate with the contact pin compliantly held suspended within the substrate by a compliant coupling structure. The suspension |
| 7335994 |
Semiconductor component having multiple stacked dice |
February 26, 2008 |
| A semiconductor package component includes a base die and a secondary die flip chip mounted to the base die. The base die includes a set of stacking contacts for flip chip mounting the secondary die to the base die, and a set of interconnect contacts configured as an internal signal |
| 7307348 |
Semiconductor components having through wire interconnects (TWI) |
December 11, 2007 |
| A semiconductor component includes a semiconductor substrate having a substrate contact, and a through wire interconnect (TWI) bonded to the substrate contact. The through wire interconnect (TWI) includes a via through the substrate contact and the substrate, a wire in the via bonded |
| 7297563 |
Method of making contact pin card system |
November 20, 2007 |
| A compliant contact pin contactor card method for making is provided. The compliant contact pin assembly includes a contact pin formed from a portion of a substrate with the contact pin compliantly held suspended within the substrate by a compliant coupling structure. The suspension |
| 7294897 |
Packaged microelectronic imagers and methods of packaging microelectronic imagers |
November 13, 2007 |
| Microelectronic imagers, methods for packaging microelectronic imagers, and methods for forming electrically conductive through-wafer interconnects in microelectronic imagers are disclosed herein. In one embodiment, a microelectronic imaging die can include a microelectronic substrat |
| 7288954 |
Compliant contact pin test assembly and methods thereof |
October 30, 2007 |
| A compliant contact pin assembly and a contactor card and methods for testing therewith are provided. The compliant contact pin assembly includes a contact pin formed from a portion of a substrate with the contact pin compliantly held suspended within the substrate by a compliant cou |
| 7288953 |
Method for testing using a universal wafer carrier for wafer level die burn-in |
October 30, 2007 |
| A reusable burn-in/test fixture for testing unsingulated dice on a semiconductor wafer consisting of two halves. The first half of the test fixture is a wafer cavity plate for receiving the wafer, and the second half establishes electrical communication between the wafer and electric |
| 7288757 |
Microelectronic imaging devices and associated methods for attaching transmissive elements |
October 30, 2007 |
| Microelectronic imaging devices and associated methods for attaching transmissive elements are disclosed. A manufacturing method in accordance with one embodiment of the invention includes providing an imager workpiece having multiple image sensor dies configured to detect energy ove |
| 7287326 |
Methods of forming a contact pin assembly |
October 30, 2007 |
| A compliant contact pin assembly method for making is provided. The compliant contact pin assembly includes a contact pin formed from a portion of a substrate with the contact pin compliantly held suspended within the substrate by a compliant coupling structure. The suspension within |
| 7282932 |
Compliant contact pin assembly, card system and methods thereof |
October 16, 2007 |
| A compliant contact pin assembly, a contactor card, a testing system and methods for making and testing are provided. A compliant contact pin assembly includes a contact pin formed from a portion of a substrate with the contact pin compliantly held suspended within the substrate by a |
| 7265330 |
Microelectronic imagers with optical devices and methods of manufacturing such microelectronic i |
September 4, 2007 |
| Microelectronic imager assemblies comprising a workpiece including a substrate and a plurality of imaging dies on and/or in the substrate. The substrate includes a front side and a back side, and the imaging dies comprise imaging sensors at the front side of the substrate and external |
| 7259578 |
System for testing semiconductor components having interconnect with variable flexure contacts |
August 21, 2007 |
| A test system for testing semiconductor components includes an interconnect having a substrate and contacts on the substrate for electrically engaging terminal contacts on the components. The interconnect also includes one or more cavities in the substrate which form flexible segment |
| 7259450 |
Double-packaged multi-chip semiconductor module |
August 21, 2007 |
| A plurality of semiconductor die is packaged into one component. The inventive design comprises devices which have been singularized, packaged and thoroughly tested for functionality and adherence to required specifications. A plurality of packaged devices is then received by a housi |
| 7256490 |
Test carrier for semiconductor components having conductors defined by grooves |
August 14, 2007 |
| A test carrier for a semiconductor component includes a base for retaining the component, and an interconnect on the base having contacts configured to electrically engage component contacts on the component. The base includes conductors in electrical communication with the contacts on t |
| 7256069 |
Wafer-level package and methods of fabricating |
August 14, 2007 |
| A carrier for use in a chip-scale package, including a polymeric film with apertures defined therethrough. The apertures, which are alignable with corresponding bond pads of a semiconductor device, each include a quantity of conductive material extending substantially through the len |
| 7250780 |
Probe card for semiconductor wafers having mounting plate and socket |
July 31, 2007 |
| A probe card for testing semiconductor wafers, and a method and system for testing wafers using the probe card are provided. The probe card is configured for use with a conventional testing apparatus, such as a wafer probe handler, in electrical communication with test circuitry. The pro |
| 7235431 |
Methods for packaging a plurality of semiconductor dice using a flowable dielectric material |
June 26, 2007 |
| A method of packaging at least a portion of a semiconductor die or dice is disclosed. Uncured material may be disposed proximate at least the periphery of at least one semiconductor die and at least partially cured substantially as a whole. Methods of forming conductive elements such as |
