| Patent Number |
Title Of Patent |
Date Issued |
| 7076597 |
Broadcast invalidate scheme |
July 11, 2006 |
| A directory-based multiprocessor cache control scheme for distributing invalidate messages to change the state of shared data in a computer system. The plurality of processors are grouped into a plurality of clusters. A directory controller tracks copies of shared data sent to proces |
| 6961781 |
Priority rules for reducing network message routing latency |
November 1, 2005 |
| A system and method is disclosed for reducing network message passing latency in a distributed multiprocessing computer system that contains a plurality of microprocessors in a computer network, each microprocessor including router logic to route message packets prioritized in importance |
| 6751721 |
Broadcast invalidate scheme |
June 15, 2004 |
| A directory-based multiprocessor cache control scheme for distributing invalidate messages to change the state of shared data in a computer system. The plurality of processors are grouped into a plurality of clusters. A directory controller tracks copies of shared data sent to proces |
| 6738836 |
Scalable efficient I/O port protocol |
May 18, 2004 |
| A system that supports a high performance, scalable, and efficient I/O port protocol to connect to I/O devices is disclosed. A distributed multiprocessing computer system contains a number of processors each coupled to an I/O bridge ASIC implementing the I/O port protocol. One or mor |
