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Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Inventor:
Walker; Howard W.
Address:
San Diego, CA
No. of patents:
10
Patents:












Patent Number Title Of Patent Date Issued
8057388 Microsensor array system November 15, 2011
A microsensor array system, comprising a pad, a plurality of actuators attached to the pad, and a plurality of microprobes, wherein substantially each microprobe in the plurality of microprobes is attached to a respective actuator in the plurality of actuators.
7383071 Microsensor system and method for measuring data June 3, 2008
One embodiment is a microprobe. An example of the microprobe comprises a housing having an aperture. This example of the microprobe also comprises an ISFET attached to the housing. The ISFET may have a gate located proximate the aperture. This example of the microprobe further comprises
7297113 Microsensor system and method for measuring data November 20, 2007
One embodiment is a microprobe. An example of the microprobe comprises a housing having an aperture. This example of the microprobe also comprises an ISFET attached to the housing. The ISFET may have a gate located proximate the aperture. This example of the microprobe further comprises
6387724 Method of fabricating silicon-on-insulator sensor having silicon oxide sensing surface May 14, 2002
An ion-sensitive sensor has an active layer of silicon with source and drain diffusion regions of a field-effect transistor formed therein, patterned layers of silicon oxide and metal on one side of the active silicon layer, and a layer of insulative support material on the metal and
5895629 Ring oscillator based chemical sensor April 20, 1999
A chemical sensor couples a material that changes temperature in response to a chemical condition with an oscillator. The oscillator is coupled to the material to detect the change in temperature in the material so that the frequency of the oscillator changes in correspondence with the c
5714793 Complementary vertical bipolar junction transistors formed in silicon-on-saphire February 3, 1998
A method is described for fabricating a complementary, vertical bipolar sconducting structure. An N+ silicon island and a P+ silicon island separated by a first oxide layer are formed on a sapphire substrate. An NPN junction device is formed on the N+ silicon island by epitaxially g
5641691 Method for fabricating complementary vertical bipolar junction transistors in silicon-on-sapphir June 24, 1997
A method is described for fabricating a complementary, vertical bipolar semiconducting structure. An N+ silicon island and a P+ silicon island separated by a first oxide layer are formed on a sapphire substrate. An NPN junction device is formed on the N+ silicon island by epitaxially
5521412 Low and high minority carrier lifetime layers in a single semiconductor structure May 28, 1996
A method for forming a semiconductor structure having a layer of low minority carrier lifetime and a layer of high minority carrier lifetime comprises the steps of forming a silicon dioxide layer on a layer of low minority carrier lifetime silicon of a silicon-on-sapphire handle wafer
5468674 Method for forming low and high minority carrier lifetime layers in a single semiconductor struc November 21, 1995
A method for forming a semiconductor structure having a layer of low minority carrier lifetime and a layer of high minority carrier lifetime comprises the steps of forming a silicon dioxide layer on a layer of low minority carrier lifetime silicon of a silicon-on-sapphire handle wafer
5402749 Ultra-high vacuum/chemical vapor deposition of epitaxial silicon-on-sapphire April 4, 1995
A method of fabricating epitaxial thin films, such as doped films or silicon-on-sapphire films, relies upon ultrahigh vacuum vapor deposition. The method calls for a preparing of an ultrahigh vacuum chamber to reduce water and oxygen pressure to below 10.sup.-10 Torr. At at least one










 
 
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