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Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Inventor:
Wachnik; Richard Andre'
Address:
Mount Kisco, NY
No. of patents:
2
Patents:




Patent Number Title Of Patent Date Issued
7260810 Method of extracting properties of back end of line (BEOL) chip architecture August 21, 2007
A method for analyzing circuit designs includes discretizing a design representation into pixel elements representative of a structure in the design and determining at least one property for each pixel element representing a portion of the design. Then, a response of the design is de
7217978 SRAM memories and microprocessors having logic portions implemented in high-performance silicon May 15, 2007
The present invention generally concerns fabrication methods and device architectures for use in memory circuits, and more particularly concerns hybrid silicon-on-insulator (SOI) and bulk architectures for use in memory circuits. Once aspect of the invention concerns CMOS SRAM cell a


 
 
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