Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Inventor:
Veliadis; John V.
Address:
Midlothian, VA
No. of patents:
1
Patents:












Patent Number Title Of Patent Date Issued
7557046 Systems and methods for interconnect metallization using a stop-etch layer July 7, 2009
Systems and methods for single lithography step interconnection metallization using a stop-etch layer are described. A method comprises depositing a stop-etch layer over a semiconductor device, depositing an interconnect metallization material over the stop-etch layer, performing a s










 
 
  Recently Added Patents
Reliable and accurate usage detection of a software application
Cycloalkylamine substituted isoquinoline and isoquinolinone derivatives
Luminescent nanosheets, and fluorescent illuminators, solar cells and color displays utilizing the same as well as nanosheet paints
Methods and systems for automatically identifying a logical circuit failure in a data network
Method of motion correction in optical coherence tomography imaging
Method and system for automatically hiding irrelevant parts of hierarchical structures in computer user interfaces
Correction information calculating device, image processing apparatus, image display system, and image correcting method
  Randomly Featured Patents
Intervertebral prosthesis
System and method for event-driven live migration of multi-process applications
Semiconductor memory device requiring refresh operation
Method for determining the concentration of fission products in a reactor coolant
Real-time digital voltage sag compensator
Method and system for providing a different frequency handoff in a CDMA cellular telephone system
Composition and method for treating lupus nephritis
Cotton gin control
Channel estimation method and apparatus in an orthogonal frequency division multiplexing (OFDM) wireless communication system
Cable positioning bracket